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path: root/src/mesa/drivers/dri/i965/brw_defines.h
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* i965: Remove strange comments about math functions.Matt Turner2013-04-241-3/+3
* i965: Remove traces of nonexistent TAN math function.Matt Turner2013-04-241-1/+0
* i965: Trim trailing whitespace in brw_defines.h.Eric Anholt2013-04-171-144/+144
* i965/vs: Use GRFs for pull constant offsets on gen7.Eric Anholt2013-04-101-0/+1
* i965: Fix INTEL_DEBUG=shader_time for fragment shaders with discards.Kenneth Graunke2013-03-291-0/+1
* i965/fs: Generate LOD sampler message from ir_lod.Matt Turner2013-03-291-0/+2
* i965: Make INTEL_DEBUG=shader_time use the RAW surface format.Kenneth Graunke2013-03-141-0/+1
* i965: Fix INTEL_DEBUG=shader_time for Haswell.Kenneth Graunke2013-03-141-0/+1
* i965: Add definitions for gen7+ data cache messages.Eric Anholt2013-03-141-0/+37
* i965/fs: Switch to using sampler LD messages for uniform pull constants.Eric Anholt2013-03-111-1/+1
* i965: add a new virtual opcode: SHADER_OPCODE_TXF_MSChris Forbes2013-03-021-0/+1
* i965: Add support for emitting the LRP instruction.Kenneth Graunke2013-02-281-0/+1
* i965/fs/gen7: Emit code for GLSL 3.00 pack/unpack operations (v4)Chad Versace2013-01-241-0/+3
* i965: Add opcodes for F32TO16 and F16TO32Chad Versace2013-01-241-0/+2
* i965: Add #defines for GL_FIXED vertex formats.Kenneth Graunke2013-01-071-0/+4
* i965: Add remaining #defines for packed vertex formats.Kenneth Graunke2013-01-071-0/+9
* i965: Use Haswell's sample_d_c for textureGrad with shadow samplers.Kenneth Graunke2013-01-071-0/+1
* i965: Replace structs with bit-shifting for Gen7 SURFACE_STATE entries.Kenneth Graunke2013-01-031-7/+36
* i965/fs: Set up gen7 UBO loads as sends from GRFs.Eric Anholt2012-12-141-0/+2
* i965/fs: Improve performance of shaders that start out with a discard.Eric Anholt2012-12-111-0/+1
* i965/fs: Rewrite discards to use a flag subreg to track discarded pixels.Eric Anholt2012-12-111-1/+0
* i965: Add a debug flag for counting cycles spent in each compiled shader.Eric Anholt2012-12-051-2/+21
* i965/fs: Add instruction emit for varying-index reads of uniforms.Eric Anholt2012-12-041-0/+3
* i965/fs: Rename the existing pull constant load opcode.Eric Anholt2012-12-041-1/+1
* i965: Fix primitive restart on Haswell.Kenneth Graunke2012-09-061-0/+3
* i965/gen6+: Add support for edge flags.Eric Anholt2012-08-091-0/+1
* i965/msaa: Add CMS-related sampler messages to brw_defines.h.Paul Berry2012-07-111-0/+2
* i965/fs: Add FS_OPCODE_MOV_DISPATCH_TO_FLAGS to fragment shader backend.Paul Berry2012-07-021-0/+1
* i965/msaa: Adapt clip setup for centroid noperspective interpolation.Paul Berry2012-06-251-0/+4
* i965/msaa: Add defines for Gen7.Paul Berry2012-05-251-0/+5
* i965/blorp: Implement proper texel fetch messages for Gen7.Paul Berry2012-05-251-0/+1
* i965: add flag to enable cut_indexJordan Justen2012-05-231-0/+2
* i965/gen6+: Add support for fast depth clears.Eric Anholt2012-05-231-1/+3
* i965/gen6: Initial implementation of MSAA.Paul Berry2012-05-151-0/+7
* i965: Set "Shader Channel Select" fields in Haswell's SURFACE_STATE.Kenneth Graunke2012-03-301-0/+8
* i965: Fill in Sample Mask in Haswell's 3DSTATE_PS.Kenneth Graunke2012-03-301-0/+2
* i965: Set "Stencil Buffer Enable" bit on Haswell.Kenneth Graunke2012-03-301-0/+1
* i965: Set Line Stipple enable bit in 3DSTATE_SF for Haswell.Kenneth Graunke2012-03-301-0/+2
* i965: Update max VS/PS threads shift offsets for Haswell.Kenneth Graunke2012-03-301-1/+3
* i965: Add support for the MAD opcode on gen6+.Eric Anholt2012-02-101-0/+1
* i965: fix inverted point sprite origin when rendering to FBOYuanhan Liu2012-01-281-0/+1
* i965: Fix misnamed GEN7_WM_DEPTH_RESOLVEChad Versace2012-01-101-1/+1
* i965/gen7: Add register definitions for GL_EXT_transform_feedback.Eric Anholt2011-12-231-2/+71
* i965 gen6: Initial implementation of transform feedback.Paul Berry2011-12-201-0/+6
* i965: Add missing SIMD4x2 sample_l_c message #defines.Kenneth Graunke2011-12-191-0/+1
* i965: Rename texturing ops from FS_OPCODE to SHADER_OPCODE, except TXB.Kenneth Graunke2011-12-181-6/+8
* i965 gen6: Implement pass-through GS for transform feedback.Paul Berry2011-12-071-0/+3
* i965: Clean up misleading defines for DWORD 2 of URB_WRITE header.Paul Berry2011-12-071-4/+4
* i965/gen6: Set vertical alignment in SURFACE_STATE batchChad Versace2011-11-221-4/+5
* i965/gen6+: Rename GEN6_CLIP_BARYCENTRIC_ENABLE.Paul Berry2011-10-271-1/+1