aboutsummaryrefslogtreecommitdiffstats
path: root/src/mesa/drivers/dri/i965/brw_context.h
Commit message (Expand)AuthorAgeFilesLines
* i965: Enable hardware-generated binding tables on render path.Abdiel Janulgue2015-07-181-0/+6
* i965: Enable resource streamer for the batchbufferAbdiel Janulgue2015-07-181-0/+1
* i965: Optimize batchbuffer macros.Matt Turner2015-07-151-2/+3
* i965: Set brw->batch.emit only #ifdef DEBUG.Matt Turner2015-07-091-0/+2
* i965: Move pipecontrol workaround bo to brw_pipe_controlChris Wilson2015-07-081-4/+8
* i965/skl: Set the pulls bary bit in 3DSTATE_PS_EXTRANeil Roberts2015-07-061-0/+1
* i965/bxt: Add basic Broxton infrastructureBen Widawsky2015-06-241-0/+1
* i965: Rename intel_emit* to reflect their new location in brw_pipe_controlChris Wilson2015-06-241-3/+3
* i965: Transplant PIPE_CONTROL routines to brw_pipe_controlChris Wilson2015-06-241-0/+11
* i965: Use a single index per shader for shader_time.Jason Ekstrand2015-06-231-11/+3
* i965: Add compiler options to brw_compilerJason Ekstrand2015-06-231-1/+0
* i965: Rename use_linear_1d_layout() and make it globalAnuj Phogat2015-06-161-0/+4
* i965: Create a shader_dispatch_mode enum to replace VS/GS fields.Kenneth Graunke2015-06-011-9/+7
* i965: Add Gen9 surface state decodingBen Widawsky2015-05-181-0/+1
* i965: Use predicate enable bit for conditional rendering w/o stallingNeil Roberts2015-05-121-0/+23
* i956: Add a function to load a 64-bit register from a bufferNeil Roberts2015-05-121-0/+5
* i965/sync: Replace prefix 'intel_sync' -> 'intel_gl_sync'Chad Versace2015-05-071-7/+0
* i965: Upload atomic buffer state for compute shadersJordan Justen2015-05-021-1/+1
* i965/state: Emit pipeline select when changing pipelinesJordan Justen2015-05-021-0/+2
* i965: Implement DispatchCompute() back-endPaul Berry2015-05-021-0/+4
* i965/cs: Emit state base addressJordan Justen2015-05-021-1/+1
* i965/fs: Add CS shader time supportJordan Justen2015-05-021-0/+3
* i965/cs: Support CS program precompileJordan Justen2015-05-021-0/+6
* i965/cs: Emit compute shader code and upload programsJordan Justen2015-05-021-0/+1
* i965/cs: Add max_cs_threadsJordan Justen2015-05-021-0/+1
* i965/cs: Add brw_cs_prog_data, brw_cs_prog_key and brw_context::cs.Paul Berry2015-05-021-0/+16
* i965/cs: Add BRW_NEW_CS_PROG_DATA and BRW_CACHE_CS_PROGJordan Justen2015-05-021-0/+2
* i965/cs: Add BRW_NEW_COMPUTE_PROGRAM state flag.Paul Berry2015-05-021-0/+3
* i965: Refactor rb surface setup to allow caller to store offsetsTopi Pohjolainen2015-04-301-4/+4
* Fix a few typosZoë Blade2015-04-271-2/+2
* i965/gen7: Factor out texture surface state set-up from gen7_update_texture_s...Francisco Jerez2015-04-271-0/+11
* i965: Add a brw_compiler structure and store the register sets in itJason Ekstrand2015-04-221-2/+2
* i965: Use device_info instead of the context for computing vue mapsJason Ekstrand2015-04-221-1/+2
* i965/device_info: Add a supports_simd16_3src flagJason Ekstrand2015-04-221-4/+0
* i965: Make the disassembler take a device_info instead of a contextJason Ekstrand2015-04-221-1/+1
* i965: Make shader_time store names/ids instead of referencing shaders.Kenneth Graunke2015-04-171-2/+2
* i965: Refactor brw_is_hiz_depth_format()Chad Versace2015-04-131-1/+0
* i965/state: Remove brw->state.dirtyJordan Justen2015-03-311-1/+0
* i965/state: Add compute pipeline with empty atom listsJordan Justen2015-03-311-0/+2
* i965/state: Create separate dirty state bits for each pipelineJordan Justen2015-03-311-0/+1
* i965/state: Support multiple pipelines in brw->num_atomsJordan Justen2015-03-311-2/+8
* i965: Store the GPU revision number in brw_contextNeil Roberts2015-03-201-0/+4
* i965: Throttle to the previous frameChris Wilson2015-03-181-1/+1
* i965: Throttle rendering to an fboChris Wilson2015-03-181-1/+13
* i965: Remove hand-rolled memcpy implementation.Matt Turner2015-03-021-27/+0
* i965: Remove the create_raw_surface vtbl hook.Francisco Jerez2015-03-021-6/+0
* i965: Add device limits for tess threads & URB entriesChris Forbes2015-02-171-0/+4
* i965: Do Sandybridge workaround flushes before each primitive.Kenneth Graunke2015-02-171-1/+0
* i965: Generalize the update_null_renderbuffer_surface vtbl hook to non-render...Francisco Jerez2015-02-101-3/+6
* i965: Allocate binding table space for shader images.Francisco Jerez2015-02-101-0/+5
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-01 10:56:20 +0000