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path: root/src/mesa/drivers/dri/i965/brw_context.c
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* i965: Move INTEL_DEBUG variable parsing to screen creation timeJason Ekstrand2015-06-231-1/+3
* i965: enable ARB_framebuffer_no_attachments for Gen7+Kevin Rogovin2015-06-171-0/+6
* Revert "i965: Advertise a line width of 40.0 on Cherryview and Skylake."Kenneth Graunke2015-06-111-5/+1
* i965: do not round line width when multisampling or antialiaing are enabledIago Toral Quiroga2015-06-111-0/+7
* i965: Set max texture buffer size to hardware limitChris Forbes2015-06-061-0/+1
* i965: Make NIR non-optional for scalar shadersJason Ekstrand2015-05-281-5/+2
* i965: Use NIR by default for vertex shaders on GEN8+Jason Ekstrand2015-05-181-1/+1
* i965: Use predicate enable bit for conditional rendering w/o stallingNeil Roberts2015-05-121-0/+4
* i965/gen6: setup limits for ARB_viewport_arrayChris Forbes2015-05-061-2/+2
* i965: Fix missing type in local variable declaration.Kenneth Graunke2015-05-051-1/+1
* i965: Implement DispatchCompute() back-endPaul Berry2015-05-021-0/+1
* i965/cs: Set invocation counts based on max_cs_threadsJordan Justen2015-05-021-0/+24
* i965/cs: Add max_cs_threadsJordan Justen2015-05-021-0/+1
* i965/fs: Support compute programs in fs_visitorJordan Justen2015-05-021-0/+2
* Fix a few typosZoë Blade2015-04-271-2/+2
* i965/device_info: Add a supports_simd16_3src flagJason Ekstrand2015-04-221-24/+0
* i965: replace __FUNCTION__ with __func__Marius Predut2015-04-141-2/+2
* i965: Remove useless null check.Matt Turner2015-04-111-4/+0
* nir: split out lower_sub from lower_negateRob Clark2015-04-111-0/+1
* i965: Use NIR by default for fragment shadersJason Ekstrand2015-04-101-1/+1
* i965: Don't set NirOptions for stages that will use the vec4 backend.cros-mesa-10.6-vanillachadv/cros-mesa-10.6-vanillachadv/cros-gerrit-262788-baseKenneth Graunke2015-04-101-9/+6
* i965: Check the INTEL_USE_NIR environment variable once at context creationJason Ekstrand2015-04-031-1/+9
* i965: Use the same nir options for all gensJason Ekstrand2015-04-011-10/+2
* i965/nir: Run the ffma peephole after the rest of the optimizationsJason Ekstrand2015-04-011-0/+5
* i965/nir: Use NIR lowering for ffma for gen < 6Jason Ekstrand2015-03-231-2/+10
* i965: define I915_PARAM_REVISIONDave Airlie2015-03-231-0/+5
* i965: Store the GPU revision number in brw_contextNeil Roberts2015-03-201-0/+19
* i965: Defer the throttle until we submit new commandsChris Wilson2015-03-181-34/+0
* i965: Throttle to the previous frameChris Wilson2015-03-181-7/+12
* i965: Throttle rendering to an fboChris Wilson2015-03-181-4/+12
* nir: Add native_integers to nir_shader_compiler_options.Kenneth Graunke2015-03-081-1/+3
* nir: Try to make sense of the nir_shader_compiler_options code.Kenneth Graunke2015-03-081-0/+5
* i965: free scratch buffers when destroying the contextIago Toral Quiroga2015-03-061-0/+6
* i965: Fix non-AA wide line rendering with fractional line widthsIago Toral Quiroga2015-02-241-2/+2
* i965: Add device limits for tess threads & URB entriesChris Forbes2015-02-171-0/+4
* i965: Sets missing vertex shader constant values for HighInt formatEduardo Lima Mitev2015-01-131-0/+6
* i965/skl: Report more accurate number of samples for formatKristian Høgsberg2015-01-071-0/+2
* i965: Generate vs code using scalar backend for BDW+Kristian Høgsberg2014-12-101-0/+13
* i965: Use ~0 to represent true on all generations.Matt Turner2014-12-051-11/+3
* i965: Remove "disable_derivative_optimization" driconf option.Kenneth Graunke2014-12-021-3/+0
* i965: Advertise a line width of 40.0 on Cherryview and Skylake.Kenneth Graunke2014-11-081-1/+5
* i965: Advertise larger line widths.Kenneth Graunke2014-11-081-3/+9
* i965: Skip recalculating URB allocations if the entry size didn't change.Eric Anholt2014-10-241-1/+1
* i965: Initialize the SampleMap{2,4,8}x variablesAnuj Phogat2014-10-011-0/+8
* i965: Avoid null access in intelMakeCurrent()Juha-Pekka Heikkila2014-09-231-3/+7
* i965/gen6/gs: Enable texture units and upload sampler state.Iago Toral Quiroga2014-09-191-1/+1
* i965: Request lowering gl_VertexIDIan Romanick2014-09-101-0/+1
* i965: Use ~0 to represent true on Gen >= 6.Matt Turner2014-08-181-1/+26
* i965: Split gen6 depth hiz state out from brwJordan Justen2014-08-151-1/+1
* i965: Split gen6 renderbuffer surface state from gen5 and olderJordan Justen2014-08-151-0/+3
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