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* Merge commit 'origin/mesa_7_7_branch'Keith Whitwell2009-12-012-1/+32
|\ | | | | | | | | | | | | | | | | | | | | Conflicts: src/gallium/drivers/svga/svga_screen_texture.c src/gallium/state_trackers/xorg/xorg_composite.c src/gallium/state_trackers/xorg/xorg_exa.c src/gallium/state_trackers/xorg/xorg_renderer.c src/gallium/state_trackers/xorg/xorg_xv.c src/mesa/main/texgetimage.c src/mesa/main/version.h
| * Merge branch 'mesa_7_6_branch' into mesa_7_7_branchIan Romanick2009-11-302-1/+32
| |\ | | | | | | | | | | | | | | | | | | Conflicts: progs/util/shaderutil.c src/mesa/drivers/dri/r600/r600_context.c src/mesa/main/version.h
| | * i915: Actually put i915PointParameterfv in the driver function table. Duh.Ian Romanick2009-11-301-0/+1
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| | * i915: Fallback bit define missed on previous commitIan Romanick2009-11-291-0/+1
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| | * i915: Round point sizes instead of truncate.Ian Romanick2009-11-291-1/+1
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| | * i915: Enable point sprite coordinate generationIan Romanick2009-11-291-0/+29
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Support still isn't completely correct, but it's better. piglit point-sprite now passes. However, glean's pointSprite test fails. In that test the texture on the sprite is somehow inverted as though GL_POINT_SPRITE_COORD_ORIGIN were set to GL_LOWER_LEFT. i915 hardware shouldn't be able to do that! I believe there are also problems when not all texture units have GL_COORD_REPLACE set. The hardware enable seems to be all or nothing. Fixes bug #25313.
| | * i915: Fix driver for the miptree x/y offset changes.Eric Anholt2009-10-272-6/+20
| | | | | | | | | | | | Bug #24734.
* | | intel: Remove our special color packing macros and just use colormac.h.Eric Anholt2009-11-192-13/+14
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* | | intel: Consistently use no_batch_wrap in intel_context struct.Eric Anholt2009-11-192-6/+0
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* | | i915: Remove dead meta_draw_quad code.Eric Anholt2009-11-191-78/+0
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* | | tnl: Replace deprecated TexCoordPtr with AttribPtr[_TNL_ATTRIB_TEX*]Eric Anholt2009-11-192-2/+2
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* | intel: Use PIPE_CONTROL on gen4 hardware for doing pipeline flushing.Eric Anholt2009-11-062-17/+0
| | | | | | | | | | | | This should do all the things that MI_FLUSH did, but it can be pipelined so that further rendering isn't blocked on the flush completion unless necessary.
* | intel: avoid unnecessary front buffer flushing/updatingBrian Paul2009-11-031-0/+1
| | | | | | | | | | | | | | | | | | | | | | Before, if we just called glXMakeCurrent() and didn't render anything we'd still trigger a flushFrontBuffer() call. Now only set the intel->front_buffer_dirty field at state validation time just before we draw something. NOTE: additional calls to intel_check_front_buffer_rendering() might be needed if I missed some rendering paths.
* | intel: update intel_create_renderbuffer(format), add XRGB supportBrian Paul2009-10-294-0/+6
| | | | | | | | | | | | | | | | Pass a gl_format to intel_create_renderbuffer() instead of GLenum. Add cases for MESA_FORMAT_XRGB8888 textures and renderbuffers. However, we don't yet create any renderbuffers or textures with that format. It seems the default alpha value is zero instead of one. Need to investigate that first.
* | i915: Fix 1D texture mapping in the t coordinate.Eric Anholt2009-10-291-0/+6
| | | | | | | | Fixes piglit tex1d-2dborder test.
* | i915: Correct and make use of the defines for 32-bit depth texture modes.Eric Anholt2009-10-292-4/+9
| | | | | | | | | | Previously, S8_Z24 depth textures would always be treated as intensity. Fixes piglit depth-tex-modes.
* | i915: Implement min/max LOD clamping with the hardware.Eric Anholt2009-10-291-4/+8
| | | | | | | | | | | | | | This gets us expected behavior for clamping between mipmap levels, and avoids relayout of textures for doing clamping. Fixes piglit lodclamp-between.
* | Merge branch 'texformat-rework'Brian Paul2009-10-285-14/+9
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Conflicts: src/mesa/drivers/dri/radeon/radeon_fbo.c src/mesa/drivers/dri/s3v/s3v_tex.c src/mesa/drivers/dri/s3v/s3v_xmesa.c src/mesa/drivers/dri/trident/trident_context.c src/mesa/main/debug.c src/mesa/main/mipmap.c src/mesa/main/texformat.c src/mesa/main/texgetimage.c
| * | i915: replace MESA_FORMAT_Z24_S8 with MESA_FORMAT_S8_Z24Brian Paul2009-10-211-2/+2
| | | | | | | | | | | | And change parameter type.
| * | mesa: remove a bunch of gl_renderbuffer fieldsBrian Paul2009-10-081-1/+1
| | | | | | | | | | | | | | | | | | _ActualFormat is replaced by Format (MESA_FORMAT_x). ColorEncoding, ComponentType, RedBits, GreenBits, BlueBits, etc. are all replaced by MESA_FORMAT_x queries.
| * | drivers: don't include texformat.hBrian Paul2009-10-055-5/+0
| | | | | | | | | | | | And remove other unneeded #includes while we're at it.
| * | mesa: replace gl_texture_format with gl_formatBrian Paul2009-09-304-8/+8
| | | | | | | | | | | | | | | | | | Now gl_texture_image::TexFormat is a simple MESA_FORMAT_x enum. ctx->Driver.ChooseTexture format also returns a MESA_FORMAT_x. gl_texture_format will go away next.
* | | i915: Fix driver for the miptree x/y offset changes.Eric Anholt2009-10-272-4/+20
| | | | | | | | | | | | Bug #24734.
* | | Merge branch 'mesa_7_6_branch'Brian Paul2009-10-221-2/+6
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| * | intel: Fallback field is a bitmask, use GLbitfieldBrian Paul2009-10-221-2/+6
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* | mesa: lift default symlinks target into Makefile.templateBrian Paul2009-10-161-1/+0
| | | | | | | | Driver Makefiles can still add symlink dependencies/rules if needed.
* | intel: pass zslice to intel_miptree_image_offset()Brian Paul2009-10-122-6/+4
| | | | | | | | | | This lets us get rid of intel_miptree_depth_offsets() and simplify all of the calling code.
* | i915: Add optional support for ARB_fragment_shader under a driconf option.Eric Anholt2009-10-011-0/+1
| | | | | | | | | | | | | | | | | | | | Other vendors have enabled ARB_fragment_shader as part of OpenGL 2.0 enablement even on hardware like the 915 with no dynamic branching or dFdx/dFdy support. But for now we'll leave it disabled because we don't do any flattening of ifs or loops, which is rather restrictive. This support is not complete, and may be unstable depending on your shaders. It passes 10/15 of the piglit glsl tests, but hangs on glean glsl1.
* | i915: Add support or fallbacks for GLSL fragment shader opcodes.Eric Anholt2009-10-011-4/+158
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* | i915: Add support for varying inputs.Eric Anholt2009-10-012-2/+23
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* | i915: Enable ARB_vertex_shader for both i915 and i830.Eric Anholt2009-10-011-0/+2
| | | | | | | | | | | | Since the TNL is all done in software anyway, it should be the same to the user who's probably using ARB_vertex_program otherwise, but gives them a nicer programming environment.
* | i915: Increase maximum program size to the hardware limits.Eric Anholt2009-10-012-7/+16
| | | | | | | | | | | | This fixes potential heap trashing if the program of choice exceeds limits, and fixes the native instructions limit being lower than what can be used by valid programs.
* | i915: Update and translate the fragment program along with state updates.Eric Anholt2009-10-014-14/+26
| | | | | | | | | | | | | | Previously, we were doing it in the midst of the pipeline run, which gave an opportunity to enable/disable fallbacks, which is certainly the wrong time to be doing so. This manifested itself in a NULL dereference for PutRow after transitioning out of a fallback during a run_pipeline in glean glsl1.
* | Revert "i915: don't validate PS program when falling back to software"Eric Anholt2009-10-011-2/+1
| | | | | | | | | | | | | | This reverts commit e7044d552c6d16389447880b8744a51de1cf0199. It prevented the driver from ever recovering from a software fallback due to a program error. The original bug it claimed to fix doesn't appear to exist post-revert.
* | i915: Bail when the fragment program has too many total instructions.Eric Anholt2009-10-011-0/+10
| | | | | | | | Previously, we'd go trashing the heap.
* | i915: Let i915_program_error take a format string, and don't use _mesa_problem.Eric Anholt2009-10-013-12/+24
| | | | | | | | | | | | It's misleading to report things like the program having too many native instructions as a Mesa implementation error, when the program may just be too big for the hardware.
* | intel: Drop my generatemipmap code in favor of the new shared code.Eric Anholt2009-09-282-2/+0
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* intel: Add support for ARB_sync.Eric Anholt2009-09-032-0/+2
| | | | | We currently weasel out of supporting the timeout parameter, but otherwise this extension looks ready, and should make the common case happy.
* i915: Fix undefined symbol as of eabe12df44a41e97fb5736959e8864ddbd01be14Eric Anholt2009-08-271-0/+1
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* ARB prog: Change handling of program parameter limitsIan Romanick2009-08-261-0/+3
| | | | | | | | | | | | | | | | | Several changes are made to program parameter limits. Several of the non-NATIVE limits are set higher. All of the NATIVE limits are set to zero in the core Mesa code. Each driver must set the actual value in its context creation routine. If the NATIVE value remains zero, this indicates that hardware shaders may not be supported. Each of the preceeding changes matches the bahavior of Apple's shader assembler, so it seems safe. Finally, we limit the value of MaxEnvParams to be no greater than MaxNativeAttribs. At least one case has been found where an application does the wrong thing if MaxNativeAttribs < MaxEnvParams. See also bugzilla #23490.
* intel: Add support for EXT_provoking_vertex.Eric Anholt2009-08-049-20/+115
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* i915: Add support for EXT_stencil_two_side and ATI_separate_stencil.Eric Anholt2009-07-295-54/+113
| | | | Passes tests/stencil_twoside and glean/stencil2.
* intel: Move note_unlock() implementation to the one place it's needed.Eric Anholt2009-06-292-15/+0
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* intel: Make LOCK_HARDWARE recursive to avoid hand-rolling recursiveness.Eric Anholt2009-06-291-5/+2
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* intel: Move intel_pixel_read.c to shared for use with i965.Eric Anholt2009-06-191-306/+1
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* i915: Add an option for testing the effect of early Z in classic mode.Eric Anholt2009-06-092-0/+10
| | | | | | The early Z stuff is supposed to be unsafe without some more work in the enable/disable path (in particular, how do we want to get it disabled on the way out to the X Server?), but at the moment is 6% in OA.
* intel: Add support for tiled textures.Eric Anholt2009-06-041-20/+27
| | | | | | | | | | This is about a 30% performance win in OA with high settings on my GM45, and experiments with 915GM indicate that it'll be around a 20% win there. Currently, 915-class hardware is seriously hurt by the fact that we use fence regs to control the tiling even for 3D instructions that could live without them, so we spend a bunch of time waiting on previous rendering in order to pull fences off. Thus, the texture_tiling driconf option defaults off there for now.
* i915: Don't rely on fence regs when we don't have to.Eric Anholt2009-06-046-62/+39
| | | | | We're on the way to telling the kernel about when we need fence regs on our objects or not, and this will cut the number of places needing them.
* i915: Remove some long-dead i830 code.Eric Anholt2009-06-041-20/+0
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* i915: Restore the Viewport and DepthRange functions on 8xx.Eric Anholt2009-05-261-0/+21
| | | | | | | Fixes failed viewport updates on glxgears (and other apps) resize since e41780fedc2c1f22b43118da30a0103fa68b769f. Bug #20473.
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