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* main: Refactor _mesa_update_draw_buffer_bounds.Laura Ekstrand2015-05-141-1/+1
| | | | | Reviewed-by: Fredrik Höglund <[email protected]> Signed-off-by: Fredrik Höglund <[email protected]>
* main: Refactor _mesa_update_framebuffer.Laura Ekstrand2015-05-141-1/+1
| | | | | | | | | _mesa_update_framebuffer now operates on arbitrary read and draw framebuffers. This allows BlitNamedFramebuffer to update the state of its arbitrary read and draw framebuffers. Reviewed-by: Fredrik Höglund <[email protected]> Signed-off-by: Fredrik Höglund <[email protected]>
* i915: Only use TEXCOORDTYPE_VECTOR with cube maps on gen2Ville Syrjälä2014-11-201-18/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | Check that the target is GL_TEXTURE_CUBE_MAP before emitting TEXCOORDTYPE_VECTOR texture coordinates. I'm not sure if the hardware would like CARTESIAN coordinates with cube maps, and as I'm too lazy to find out just emit the VECTOR coordinates for cube maps always. For other targets use CARTESIAN or HOMOGENOUS depending on the number of texture coordinates provided. Fixes rendering of the "electric" background texture in chromium-bsu main menu. We appear to be provided with three texture coordinates there (I'm guessing due to the funky texture matrix rotation it does). So the code would decide to use TEXCOORDTYPE_VECTOR instead of TEXCOORDTYPE_CARTESIAN even though we're dealing with a 2D texure. The results weren't what one might expect. demos/cubemap still works, which hopefully indicates that this doesn't break things. Also tested with: bin/glean -o -v -v -v -t +texCube --quick bin/cubemap -auto from piglit. Reviewed-by: Ian Romanick <[email protected]> Signed-off-by: Ville Syrjälä <[email protected]>
* i915: Emit 3DSTATE_SCISSOR_RECTANGLE_0 before 3DSTATE_SCISSOR_ENABLEVille Syrjälä2014-11-131-1/+1
| | | | | | | | | | | | | | | According to gen2 BSpec the pipeline must be flushed at least up to the windower before changing the scissor rect enable field. Emitting the 3DSTATE_SCISSOR_RECTANGLE_0 before 3DSTATE_SCISSOR_ENABLE is sufficient to do that. gen3 BSpec no longer has that piece of text, but let's make the same change there too for symmetry. The spec does still say that the scissor rectangle must be defined before enabling it, so the new order does seem more in line with the spec. Reviewed-by: Eric Anholt <[email protected]> Signed-off-by: Ville Syrjälä <[email protected]>
* mesa: Fix MESA_FORMAT_Z24_UNORM_S8_UINT vs. X8_UINT mix-up.Kenneth Graunke2014-02-091-4/+4
| | | | | | | | | | | | | | | | | | | | In commit eeed49f5f290793870c60b5b635b977a732a1eb4, Mark accidentally renamed MESA_FORMAT_S8_Z24 to MESA_FORMAT_Z24_UNORM_X8_UINT and MESA_FORMAT_X8_Z24 to MESA_FORMAT_Z24_UNORM_S8_UINT, reversing their sense. The commit message was correct, but what sed commands actually got run didn't match that. This patch swaps the two enum names, reversing them. This should undo the damage, but might break things if people have manually fixed a few instances in the meantime... Mark's commit also failed to mention renames: s/MESA_FORMAT_ARGB2101010_UINT\b/MESA_FORMAT_B10G10R10A2_UINT/g s/MESA_FORMAT_ABGR2101010\b/MESA_FORMAT_R10G10B10A2_UNORM/g but those seem okay. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* mesa: Change many Type P MESA_FORMATs to meet naming specMark Mueller2014-01-271-7/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Conversion of Type P formats as follows (w/related comment fixes): s/MESA_FORMAT_RGB565\b/MESA_FORMAT_B5G6R5_UNORM/g s/MESA_FORMAT_RGB565_REV\b/MESA_FORMAT_R5G6B5_UNORM/g s/MESA_FORMAT_ARGB4444\b/MESA_FORMAT_B4G4R4A4_UNORM/g s/MESA_FORMAT_ARGB4444_REV\b/MESA_FORMAT_A4R4G4B4_UNORM/g s/MESA_FORMAT_RGBA5551\b/MESA_FORMAT_A1B5G5R5_UNORM/g s/MESA_FORMAT_XBGR8888_SNORM\b/MESA_FORMAT_R8G8B8X8_SNORM/g s/MESA_FORMAT_XBGR8888_SRGB\b/MESA_FORMAT_R8G8B8X8_SRGB/g s/MESA_FORMAT_ARGB1555\b/MESA_FORMAT_B5G5R5A1_UNORM/g s/MESA_FORMAT_ARGB1555_REV\b/MESA_FORMAT_A1R5G5B5_UNORM/g s/MESA_FORMAT_AL44\b/MESA_FORMAT_L4A4_UNORM/g s/MESA_FORMAT_RGB332\b/MESA_FORMAT_B2G3R3_UNORM/g s/MESA_FORMAT_ARGB2101010\b/MESA_FORMAT_B10G10R10A2_UNORM/g s/MESA_FORMAT_Z24_S8\b/MESA_FORMAT_S8_UINT_Z24_UNORM/g s/MESA_FORMAT_S8_Z24\b/MESA_FORMAT_Z24_UNORM_S8_UINT/g s/MESA_FORMAT_X8_Z24\b/MESA_FORMAT_Z24_UNORM_X8_UINT/g s/MESA_FORMAT_Z24_X8\b/MESA_FORMAT_X8Z24_UNORM/g s/MESA_FORMAT_RGB9_E5_FLOAT\b/MESA_FORMAT_R9G9B9E5_FLOAT/g s/MESA_FORMAT_R11_G11_B10_FLOAT\b/MESA_FORMAT_R11G11B10_FLOAT/g s/MESA_FORMAT_Z32_FLOAT_X24S8\b/MESA_FORMAT_Z32_FLOAT_S8X24_UINT/g s/MESA_FORMAT_ABGR2101010_UINT\b/MESA_FORMAT_R10G10B10A2_UINT/g s/MESA_FORMAT_XRGB4444_UNORM\b/MESA_FORMAT_B4G4R4X4_UNORM/g s/MESA_FORMAT_XRGB1555_UNORM\b/MESA_FORMAT_B5G5R5X1_UNORM/g s/MESA_FORMAT_XRGB2101010_UNORM\b/MESA_FORMAT_B10G10R10X2_UNORM/g s/MESA_FORMAT_AL88\b/MESA_FORMAT_L8A8_UNORM/g s/MESA_FORMAT_AL88_REV\b/MESA_FORMAT_A8L8_UNORM/g s/MESA_FORMAT_AL1616\b/MESA_FORMAT_L16A16_UNORM/g s/MESA_FORMAT_AL1616_REV\b/MESA_FORMAT_A16L16_UNORM/g s/MESA_FORMAT_RG88\b/MESA_FORMAT_G8R8_UNORM/g s/MESA_FORMAT_GR88\b/MESA_FORMAT_R8G8_UNORM/g s/MESA_FORMAT_GR1616\b/MESA_FORMAT_R16G16_UNORM/g s/MESA_FORMAT_RG1616\b/MESA_FORMAT_G16R16_UNORM/g s/MESA_FORMAT_SRGBA8\b/MESA_FORMAT_A8B8G8R8_SRGB/g s/MESA_FORMAT_SARGB8\b/MESA_FORMAT_B8G8R8A8_SRGB/g s/MESA_FORMAT_SLA8\b/MESA_FORMAT_L8A8_SRGB/g Conflicts: src/mesa/drivers/dri/i965/brw_surface_formats.c src/mesa/main/format_pack.c src/mesa/main/format_unpack.c src/mesa/main/formats.c src/mesa/main/texformat.c src/mesa/main/texstore.c
* mesa: Change many Type A MESA_FORMATs to meet naming standardMark Mueller2014-01-271-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Update comments. Conversion of the following Type A formats: s/MESA_FORMAT_RGB888\b/MESA_FORMAT_BGR_UNORM8/g s/MESA_FORMAT_BGR888\b/MESA_FORMAT_RGB_UNORM8/g s/MESA_FORMAT_A8\b/MESA_FORMAT_A_UNORM8/g s/MESA_FORMAT_A16\b/MESA_FORMAT_A_UNORM16/g s/MESA_FORMAT_L8\b/MESA_FORMAT_L_UNORM8/g s/MESA_FORMAT_L16\b/MESA_FORMAT_L_UNORM16/g s/MESA_FORMAT_I8\b/MESA_FORMAT_I_UNORM8/g s/MESA_FORMAT_I16\b/MESA_FORMAT_I_UNORM16/g s/MESA_FORMAT_R8\b/MESA_FORMAT_R_UNORM8/g s/MESA_FORMAT_R16\b/MESA_FORMAT_R_UNORM16/g s/MESA_FORMAT_Z16\b/MESA_FORMAT_Z_UNORM16/g s/MESA_FORMAT_Z32\b/MESA_FORMAT_Z_UNORM32/g s/MESA_FORMAT_S8\b/MESA_FORMAT_S_UINT8/g s/MESA_FORMAT_SRGB8\b/MESA_FORMAT_BGR_SRGB8/g s/MESA_FORMAT_RGBA_16\b/MESA_FORMAT_RGBA_UNORM16/g s/MESA_FORMAT_SL8\b/MESA_FORMAT_L_SRGB8/g s/MESA_FORMAT_Z32_FLOAT\b/MESA_FORMAT_Z_FLOAT32/g s/MESA_FORMAT_XBGR16161616_UNORM\b/MESA_FORMAT_RGBX_UNORM16/g s/MESA_FORMAT_XBGR16161616_SNORM\b/MESA_FORMAT_RGBX_SNORM16/g s/MESA_FORMAT_XBGR16161616_FLOAT\b/MESA_FORMAT_RGBX_FLOAT16/g s/MESA_FORMAT_XBGR16161616_UINT\b/MESA_FORMAT_RGBX_UINT16/g s/MESA_FORMAT_XBGR16161616_SINT\b/MESA_FORMAT_RGBX_SINT16/g s/MESA_FORMAT_XBGR32323232_FLOAT\b/MESA_FORMAT_RGBX_FLOAT32/g s/MESA_FORMAT_XBGR32323232_UINT\b/MESA_FORMAT_RGBX_UINT32/g s/MESA_FORMAT_XBGR32323232_SINT\b/MESA_FORMAT_RGBX_SINT32/g s/MESA_FORMAT_XBGR8888_UINT\b/MESA_FORMAT_RGBX_UINT8/g s/MESA_FORMAT_XBGR8888_SINT\b/MESA_FORMAT_RGBX_SINT8/g
* mesa: Rename 4 color component unsigned byte MESA_FORMATsMark Mueller2014-01-271-2/+2
| | | | | | | | | | | | | Change all 4 color component unsigned byte formats to meet spec for P Type formats: s/MESA_FORMAT_RGBA8888\b/MESA_FORMAT_A8B8G8R8_UNORM/g s/MESA_FORMAT_RGBA8888_REV\b/MESA_FORMAT_R8G8B8A8_UNORM/g s/MESA_FORMAT_ARGB8888\b/MESA_FORMAT_B8G8R8A8_UNORM/g s/MESA_FORMAT_ARGB8888_REV\b/MESA_FORMAT_A8R8G8B8_UNORM/g s/MESA_FORMAT_RGBX8888\b/MESA_FORMAT_X8B8G8R8_UNORM/g s/MESA_FORMAT_RGBX8888_REV\b/MESA_FORMAT_R8G8B8X8_UNORM/g s/MESA_FORMAT_XRGB8888\b/MESA_FORMAT_B8G8R8X8_UNORM/g s/MESA_FORMAT_XRGB8888_REV\b/MESA_FORMAT_X8R8G8B8_UNORM/g
* mesa: change gl_format to mesa_formatMark Mueller2014-01-271-1/+1
| | | | s/\bgl_format\b/mesa_format/g. Use better name for Mesa Formats enum
* s/Tungsten Graphics/VMware/José Fonseca2014-01-171-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Tungsten Graphics Inc. was acquired by VMware Inc. in 2008. Leaving the old copyright name is creating unnecessary confusion, hence this change. This was the sed script I used: $ cat tg2vmw.sed # Run as: # # git reset --hard HEAD && find include scons src -type f -not -name 'sed*' -print0 | xargs -0 sed -i -f tg2vmw.sed # # Rename copyrights s/Tungsten Gra\(ph\|hp\)ics,\? [iI]nc\.\?\(, Cedar Park\)\?\(, Austin\)\?\(, \(Texas\|TX\)\)\?\.\?/VMware, Inc./g /Copyright/s/Tungsten Graphics\(,\? [iI]nc\.\)\?\(, Cedar Park\)\?\(, Austin\)\?\(, \(Texas\|TX\)\)\?\.\?/VMware, Inc./ s/TUNGSTEN GRAPHICS/VMWARE/g # Rename emails s/[email protected]/[email protected]/ s/[email protected]/[email protected]/g s/jrfonseca-at-tungstengraphics-dot-com/jfonseca-at-vmware-dot-com/ s/jrfonseca\[email protected]/[email protected]/g s/keithw\[email protected]/[email protected]/g s/[email protected]/[email protected]/g s/thomas-at-tungstengraphics-dot-com/thellstom-at-vmware-dot-com/ s/[email protected]/[email protected]/ # Remove dead links s@Tungsten Graphics (http://www.tungstengraphics.com)@Tungsten Graphics@g # C string src/gallium/state_trackers/vega/api_misc.c s/"Tungsten Graphics, Inc"/"VMware, Inc"/ Reviewed-by: Brian Paul <[email protected]>
* mesa: Eliminate parameters to dd_function_table::ScissorIan Romanick2014-01-151-2/+1
| | | | | | | | The i830 and i915 drivers used them, but they didn't really need to. They will just be annoying in future patches. Signed-off-by: Ian Romanick <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i915: Remove spurious calls to DepthRangeIan Romanick2014-01-151-5/+1
| | | | | | | | | For both i830 and i915, the driver DepthRange function just calls intelCalcViewport. Signed-off-by: Ian Romanick <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Cc: Eric Anholt <[email protected]>
* i915: Remove gen6+ batchbuffer support.Eric Anholt2013-06-281-3/+3
| | | | | | | | While i915 does have hardware contexts in hardware, we don't expect there to ever be SW support for it (given that support hasn't even made it back to gen5 or gen4). Reviewed-by: Kenneth Graunke <[email protected]>
* i915: Remove all the HiZ code from i915.Eric Anholt2013-06-281-7/+0
| | | | | | v2: Remove extra struct forward declaration (change by Ken) Reviewed-by: Kenneth Graunke <[email protected]>
* i830: Move assert-only code into the assert.Eric Anholt2013-04-121-4/+1
| | | | | | | The call has no side effects, and moving it into the assert cleans up a compile warning in the release build. Reviewed-by: Matt Turner <[email protected]>
* intel: Make more consistent use of _mesa_is_{user,winsys}_fbo()Paul Berry2012-07-261-1/+2
| | | | | | | | | | A lot of code was still differentiating between between winsys and user fbos by testing the fbo's name against zero. This converts everything in the i915 and 965 drivers over to use _mesa_is_user_fbo() and _mesa_is_winsys_fbo(). Reviewed-by: Brian Paul <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* dri/i915: Fix off-by-one in i830 clip region size.Alban Browaeys2012-03-021-2/+2
| | | | | | | | | | | | | | | | | | The hardware, like i915, uses an inclusive bounds on min and max for the drawing rectangle, but we were providing a number for exclusive. The number of bits used by the hardware only covers this value going up to the maximum size, so when we programmed 2048 as the maximum inclusive X, it saw a maximum X of 0 and clipped all rendering. This caused rendering failures in gnome-shell. Fixes piglit fbo-maxsize. v2: dropped changes to the blitter, which does use an exclusive x2, y2. [change by anholt] Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=45558 Reviewed-by: Eric Anholt <[email protected]> NOTE: This is a candidate for release branches.
* i915: Fix piglit fbo-nodepth-test on i830.Eric Anholt2012-03-021-2/+1
| | | | | | | | | This is a direct port of fc4fba52cf7e9616c70dd76b4d6bdba6582e157b from i915, and fixes GPU hangs when running piglit. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=41372 Reviewed-by: Eric Anholt <[email protected]> NOTE: This is a candidate for release branches.
* intel: Pass the gl_renderbuffer to render_target_supported() vtable method.Eric Anholt2012-01-271-1/+4
| | | | | | I'm going to want to go looking at it for an integer texture fix. NOTE: This is a candidate for the 8.0 branch.
* intel: use intel_rb_format() to get renderbuffer formatBrian Paul2012-01-241-3/+3
| | | | This will make future changes cleaner and less invasive.
* i915: Convert to use GLbitfield64 directly.Mathias Fröhlich2011-12-281-13/+11
| | | | | Signed-off-by: Mathias Froehlich <[email protected]> Reviewed-by: Brian Paul <[email protected]>
* i915: Fix build since hiz merge.Eric Anholt2011-11-231-9/+10
| | | | | | | | v2: Guard against rb->mt being NULL, since we may enter the draw regions path before intel_prepare_render() has been called to set them. Reviewed-by: Chad Versace <[email protected]> (v1)
* intel: Add the context to the render_target_supported() vtbl method.Eric Anholt2011-11-221-1/+1
| | | | | | | We're going to want to provide different answers per chipset generation. Reviewed-by: Kenneth Graunke <[email protected]>
* intel: Remove unused HiZ functionsChad Versace2011-11-221-9/+0
| | | | | | | | | | | | | | Remove the following functions: i830_hiz_resolve_noop i915_hiz_resolve_noop brw_hiz_resolve_noop My original strategy for how intel->vtbl.resolve_*buffer was used has substantially changed. The above functions are no longer called in the current strategy. Reviewed-by: Eric Anholt <[email protected]> Signed-off-by: Chad Versace <[email protected]>
* i915: make i830/i915_hiz_resolve_noop() staticBrian Paul2011-10-181-1/+1
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* intel: Add HiZ operations to intel_context::vtbl for all driversChad Versace2011-10-181-0/+9
| | | | | | | | | | | | | Add the following to the vtbl: hiz_resolve_depthbuffer hiz_resolve_hizbuffer For all drivers for which HiZ is not enabled, the methods are set to be no-ops. If HiZ is enabled, the methods are currently to set to empty stubs. Reviewed-by: Eric Anholt <[email protected]> Signed-off-by: Chad Versace <[email protected]>
* intel: Convert from GLboolean to 'bool' from stdbool.h.Kenneth Graunke2011-10-181-11/+11
| | | | | | | | | | | | | | | | | I initially produced the patch using this bash command: for file in {intel,i915,i965}/*.{c,cpp,h}; do [ ! -h $file ] && sed -i 's/GLboolean/bool/g' $file && sed -i 's/GL_TRUE/true/g' $file && sed -i 's/GL_FALSE/false/g' $file; done Then I manually added #include <stdbool.h> to fix compilation errors, and converted a few functions back to GLboolean that were used in core Mesa's function pointer table to avoid "incompatible pointer" warnings. Finally, I cleaned up some whitespace issues introduced by the change. Signed-off-by: Kenneth Graunke <[email protected]> Acked-by: Chad Versace <[email protected]> Acked-by: Paul Berry <[email protected]>
* i915,i830: Remove dead HiZ assertions in *update_draw_buffer()Chad Versace2011-10-071-2/+0
| | | | | | | | | | | | i915 and i830 hardware doesn't have HiZ, so remove all HiZ related assertions from *update_draw_buffer(). I've removed the dead format checks completely rather than replace them with more appropriate checks. This doesn't reduce "assertion coverage", however, because when I added these HiZ related assertions in c8fdf66 there were no pre-existing checks there. Signed-off-by: Chad Versace <[email protected]>
* intel: Rename region->buffer to region->bo, and remove accessor function.Eric Anholt2011-09-261-4/+4
| | | | | | | We call all the other drm_intel_bo pointers in intel/*.h "bo", so this one was rather out of place. Acked-by: Kenneth Graunke <[email protected]>
* i830: Add missing vtable entry for i830 from the hiz work.Carl Simonson2011-08-101-0/+7
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* i915: Remove i965 paths from i915_update_drawbuffer() and i830's too.Eric Anholt2011-07-181-55/+10
| | | | Reviewed-by: Chad Versace <[email protected]>
* intel: Move intel_draw_buffers() code into each driver.Eric Anholt2011-07-181-0/+202
| | | | | | | | The illusion of shared code here wasn't fooling anybody. It was tempting to keep i830 and i915 still shared, but I think I actually want to make them diverge shortly. Reviewed-by: Chad Versace <[email protected]>
* intel: Rely on intel_region_reference()'s support of *dst != NULL.Eric Anholt2011-07-071-2/+0
| | | | Reviewed-by: Chad Versace <[email protected]>
* i965: Don't bother telling swrast_setup about state updates until fallback.Eric Anholt2011-06-241-0/+2
| | | | Reviewed-by: Ian Romanick <[email protected]>
* i965: Don't bother telling tnl about state updates unless we fall back.Eric Anholt2011-06-241-0/+6
| | | | | | This was sucking up 1% of the CPU on 3DMMES. Reviewed-by: Ian Romanick <[email protected]>
* intel: Move the draw_x/draw_y to the renderbuffer where it belongs.Eric Anholt2011-06-131-10/+18
| | | | | | | | | | | | | | | | It was originally located in the region because the tracking of depth/color buffers was on the regions, and getting back to the irb would have been tricky. Now, we're keying off of the renderbuffer in more places, which means we can move these fields where they belong. This could fix potential rendering failure with a single texture having multiple images attached to different renderbuffers across shareCtx (as far as I can tell, this was the only failure we could cause, since anything else should trigger intel_render_texture in between, for example a BindFramebuffer). Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Chad Versace <[email protected]>
* intel: use pwrite for batchChris Wilson2011-02-211-6/+4
| | | | | | | | | | | It's faster. Not only is the memcpy more efficiently performed in the kernel (making up for the system call overhead), but by not using mmap we remove the greater overhead of tracking the vma of every batch. And it means we can read back from the batch buffer without incurring the cost of a uncached read through the GTT. Signed-off-by: Chris Wilson <[email protected]>
* i915: Drop old checks for the settexoffset hack.Eric Anholt2011-01-071-8/+3
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* intel: Add a vtbl hook for determining if a format is renderable.Eric Anholt2011-01-071-18/+23
| | | | | | | By relying on just intel_span_supports_format, some formats that aren't supported pre-gen4 were not reporting FBO incomplete. And we also complained in stderr when it happened on i915 because draw_region gets called before framebuffer completeness validation.
* i965: Add support for using the BLT ring on gen6.Eric Anholt2010-12-131-2/+3
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* Drop GLcontext typedef and use struct gl_context insteadKristian Høgsberg2010-10-131-2/+2
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* i915: Silence unused variable warning in non-debug builds.Vinson Lee2010-10-081-0/+1
| | | | | | Fixes this GCC warning. i830_vtbl.c: In function 'i830_assert_not_dirty': i830_vtbl.c:704: warning: unused variable 'i830'
* intel: Change dri_bo_* to drm_intel_bo* to consistently use new API.Eric Anholt2010-06-081-2/+2
| | | | | The slightly less mechanical change of converting the emit_reloc calls will follow.
* i915: Fix up i830 for tiled drawing offsets.Eric Anholt2010-03-041-9/+34
| | | | Corresponds to b87406e55f029d29594ae76a4b39a4fe1007fe4f.
* i915: Remove unused initial and current state, now that there's nothing else.Eric Anholt2010-01-281-7/+4
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* intel: Remove long-disabled meta readpixels, and associated meta support.Eric Anholt2010-01-281-30/+9
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* dri: Remove unnecessary glapi headers.Chia-I Wu2010-01-211-2/+0
| | | | They are not used at all.
* intel: Drop more cliprect bookkeepingKristian Høgsberg2010-01-041-30/+16
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* intel: Drop batchbuffer cliprect_mode trackingKristian Høgsberg2010-01-041-9/+5
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* Merge branch 'mesa_7_7_branch'Brian Paul2009-12-111-2/+2
|\ | | | | | | | | | | Conflicts: src/gallium/state_trackers/xorg/xorg_xv.c src/mesa/drivers/dri/intel/intel_span.c
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