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* nir/i965: add before ffma algebraic optsTimothy Arceri2017-04-241-0/+6
* i965/vec4: Avoid reswizzling MACH instructions in opt_register_coalesce().Kenneth Graunke2017-04-221-0/+7
* anv/query: Use genxml for MI_MATHJason Ekstrand2017-04-201-43/+28
* genxml: Add better support for MI_MATHJason Ekstrand2017-04-203-12/+195
* genxml/pack: Allow hex values in the XMLJason Ekstrand2017-04-201-1/+2
* anv/cmd_buffer: Disable CCS on BDW input attachmentsNanley Chery2017-04-172-30/+13
* anv: blorp: flush memory after copyLionel Landwerlin2017-04-171-2/+2
* intel/decoder: Fix is_header_field starting condition.Kenneth Graunke2017-04-161-1/+1
* anv: Add the pci_id into the shader cache UUIDJason Ekstrand2017-04-141-5/+15
* i965: Use correct VertStride on align16 instructions.Matt Turner2017-04-141-10/+34
* i965/vec4/dce: improve track of partial flag register writesSamuel Iglesias Gonsálvez2017-04-141-1/+1
* i965/vec4: don't do horizontal stride on some register file typesSamuel Iglesias Gonsálvez2017-04-141-2/+5
* i965/vec4: Fix exec size for MOVs {SET,PICK}_{HIGH,LOW}_32BIT.Matt Turner2017-04-141-4/+12
* i965/vec4: use vec4_builder to emit instructions in setup_imm_df()Samuel Iglesias Gonsálvez2017-04-142-50/+50
* i965/vec4: consider subregister offset in live variablesJuan A. Suarez Romero2017-04-141-2/+2
* i965/vec4: fix assert to detect SIMD lowered DF instructions in IVBFrancisco Jerez2017-04-141-5/+1
* i965/vec4: split VEC4_OPCODE_FROM_DOUBLE into one opcode per destination's typeSamuel Iglesias Gonsálvez2017-04-147-27/+60
* i965/vec4: split d2x conversion and data gathering from one opcode to two exp...Samuel Iglesias Gonsálvez2017-04-142-8/+1
* i965/vec4: fix VEC4_OPCODE_FROM_DOUBLE for IVB/BYTJuan A. Suarez Romero2017-04-141-7/+19
* i965/vec4: keep original type when dealing with null registersJuan A. Suarez Romero2017-04-141-0/+2
* i965/vec4: split DF instructions and later double its execsize in IVB/BYTSamuel Iglesias Gonsálvez2017-04-143-1/+53
* i965/fs: lower all non-force_writemask_all DF instructions to SIMD4 on IVB/BYTSamuel Iglesias Gonsálvez2017-04-141-0/+9
* i965/fs: Get 64-bit indirect moves working on IVB.Francisco Jerez2017-04-141-2/+25
* i965: Use source region <1,2,0> when converting to DF.Matt Turner2017-04-142-13/+28
* i965/fs: fix lower SIMD width for IVB/BYT's MOV_INDIRECTJuan A. Suarez Romero2017-04-141-3/+14
* i965/fs: fix dst stride in IVB/BYT type conversionsJuan A. Suarez Romero2017-04-141-27/+41
* i965/fs: rename lower_d2x to lower_conversionsSamuel Iglesias Gonsálvez2017-04-144-4/+4
* Revert "i965/fs: Don't emit SEL instructions for type-converting MOVs."Samuel Iglesias Gonsálvez2017-04-141-2/+0
* i965/fs: generalize the legalization d2x passSamuel Iglesias Gonsálvez2017-04-142-37/+67
* i965: Use <0,2,1> region for scalar DF sources on IVB/BYT.Matt Turner2017-04-141-0/+13
* i965/fs: clamp exec_size when an instruction has a scalar DF sourceSamuel Iglesias Gonsálvez2017-04-141-3/+8
* i965/fs: double regioning parameters and execsize for DF in IVB/BYTJuan A. Suarez Romero2017-04-141-7/+43
* i965/fs: add helper to retrieve instruction execution typeJuan A. Suarez Romero2017-04-143-5/+64
* i965: Handle IVB DF differences in the validator.Matt Turner2017-04-141-0/+24
* i965/disasm: also print nibctrl in IVB for execsize=8Iago Toral Quiroga2017-04-141-3/+3
* anv/blorp: Properly handle VK_ATTACHMENT_UNUSEDJason Ekstrand2017-04-141-5/+22
* anv/cmd_buffer: Use the null surface state for ATTACHMENT_UNUSEDJason Ekstrand2017-04-141-2/+14
* anv/cmd_buffer: Always set up a null surface stateJason Ekstrand2017-04-141-31/+19
* anv/cmd_buffer: Flush the VF cache at the top of all primariesJason Ekstrand2017-04-141-0/+12
* anv/blorp: Flush the texture cache in UpdateBufferJason Ekstrand2017-04-141-0/+7
* anv: Limit VkDeviceMemory objects to 2GBJason Ekstrand2017-04-141-0/+20
* intel/blorp: Add a blorp_emit_dynamic macroJason Ekstrand2017-04-141-64/+50
* anv: Only define wsi_cbs when VK_USE_PLATFORM_WAYLAND_KHR definedMatt Turner2017-04-121-0/+2
* i965/fs: Take into account lower frequency of conditional blocks in spilling ...Francisco Jerez2017-04-111-5/+14
* anv: remove needless VALGRIND_MAKE_MEM_DEFINEDJuan A. Suarez Romero2017-04-111-1/+0
* intel/blorp: Use ISL for emitting depth/stencil/hizJason Ekstrand2017-04-101-86/+33
* intel/blorp: Emit 3DSTATE_STENCIL_BUFFER before HIER_DEPTHJason Ekstrand2017-04-101-12/+12
* anv: Use ISL for emitting depth/stencil/hizJason Ekstrand2017-04-103-181/+41
* intel/isl: Add support for emitting depth/stencil/hizJason Ekstrand2017-04-105-0/+401
* intel/isl: Use genx_bits.h instead of a hand-rolled tableJason Ekstrand2017-04-071-18/+13
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