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* i965/cnl: Add l3 configuration for CannonlakeBen Widawsky2017-06-201-1/+20
* i965: Add a variable for way size per bank in get_l3_way_size()Anuj Phogat2017-06-201-5/+4
* i965: Fix broxton 2x6 l3 configAnuj Phogat2017-06-201-0/+16
* intel/blorp: Apply source offset in the TEX caseIan Romanick2017-06-201-0/+3
* intel/blorp: Apply Gen4 coord. normalization after cubemap sizes are adjustedIan Romanick2017-06-201-9/+11
* intel/blorp: Set needs_(dst|src)_offset for Gen4 cubemapsJason Ekstrand2017-06-201-2/+6
* intel: common: add number of thread per euLionel Landwerlin2017-06-192-2/+28
* intel: common: express timestamps units in frequencyLionel Landwerlin2017-06-193-12/+14
* intel: common: add flag to identify platforms by nameLionel Landwerlin2017-06-192-6/+24
* anv: Fix L3 cache programming on Bay TrailJonas Kulla2017-06-191-1/+1
* intel/isl/gen6: Allow arrayed stencilTopi Pohjolainen2017-06-171-1/+0
* genxml: The viewport state offset is actually an address.Rafael Antognolli2017-06-161-1/+1
* genxml: Rename fields to match gen6+.Rafael Antognolli2017-06-163-3/+3
* genxml: Rename SF_STATE field to match gen6+.Rafael Antognolli2017-06-163-9/+9
* intel/isl: Add the maximum surface size limitAnuj Phogat2017-06-161-0/+22
* intel/isl: Use uint64_t to store total surface sizeAnuj Phogat2017-06-162-2/+3
* intel/blorp: Work around Sandy Bridge occlusion query issueJason Ekstrand2017-06-141-0/+10
* intel/isl: Properly set SeparateStencilBufferEnable on gen5-6Jason Ekstrand2017-06-141-3/+10
* genxml: Fix Gen4-5 SF_STATE "Line Width" fixed point type.Kenneth Graunke2017-06-143-3/+3
* i965/cnl: Add a preliminary device for CannonlakeBen Widawsky2017-06-091-0/+46
* anv: Don't advertise support on anything above gen9Jason Ekstrand2017-06-091-1/+1
* i965/cnl: Enable CCS_E and RT support for few formatsAnuj Phogat2017-06-091-9/+9
* i965/cnl: Reformat surface_format_info table to accomodate gen10+Anuj Phogat2017-06-091-263/+263
* i965/cnl: Make URB {VS, GS, HS, DS} sizes non multiple of 3Anuj Phogat2017-06-094-4/+33
* i965/cnl: Handle gen10 in switch cases across the driverAnuj Phogat2017-06-094-0/+13
* i965/cnl: Update few assertionsAnuj Phogat2017-06-091-1/+1
* i965/cnl: Add cnl bits in aubinatorAnuj Phogat2017-06-091-3/+5
* i965/cnl: Wire up android Mesa build files for gen10Anuj Phogat2017-06-093-0/+46
* i965/cnl: Wire up Mesa build files for gen10Anuj Phogat2017-06-093-3/+18
* intel/genxml: Update genx_bits for gen10+Anuj Phogat2017-06-091-4/+2
* i965/cnl: Add gen10 specific function declarationsAnuj Phogat2017-06-091-0/+12
* i965/cnl: Include gen10_pack.hAnuj Phogat2017-06-091-0/+2
* i965/cnl: Define genX(x) and GENX(x) for gen10Anuj Phogat2017-06-091-0/+3
* i965/genxml: Add gen10.xmlJason Ekstrand2017-06-091-0/+3562
* i965: Make feature macros gen8 basedBen Widawsky2017-06-091-8/+5
* intel/isl: Add an enum for describing auxiliary compression stateJason Ekstrand2017-06-071-0/+169
* blorp: Use FullSurfaceDepthandStencilClear for blorp_hiz_opJason Ekstrand2017-06-073-0/+5
* intel/blorp: Plumb through access to the workaround BOJason Ekstrand2017-06-072-2/+19
* anv/blorp: Move the depth cache flush outside of BLORPNanley Chery2017-06-072-8/+16
* intel/blorp: Refactor the HiZ op interfaceJason Ekstrand2017-06-073-53/+59
* i965/miptree: Store fast clear colors in an isl_color_valueJason Ekstrand2017-06-073-2/+21
* intel: Fix broxton 2x6 way size computationAnuj Phogat2017-06-061-0/+4
* tree-wide: remove trailing backslashEric Engestrom2017-06-071-1/+1
* anv: Set better descriptor set limitsAlex Smith2017-06-061-3/+6
* anv: Set driver version to Mesa versionAlex Smith2017-06-061-1/+1
* util/vulkan: Move Vulkan utilities to src/vulkan/utilAlex Smith2017-06-068-8/+8
* intel: gen-decoder: rework how we handle groupsLionel Landwerlin2017-06-063-104/+161
* i965: Change INTEL_DEBUG=vec4 to INTEL_SCALAR_VS for consistency.Kenneth Graunke2017-06-053-3/+2
* i965: Simplify l3 way size computationsAnuj Phogat2017-06-021-10/+2
* i965: Add and initialize l3_banks field for gen7+Anuj Phogat2017-06-022-3/+27
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