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* anv/pipeline: Set up point coord enablesJason Ekstrand2016-07-221-0/+5
| | | | | | | Signed-off-by: Jason Ekstrand <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Tested-by: Lionel Landwerlin <[email protected]> Cc: "12.0" <[email protected]>
* anv/image: Assert that the image format is actually supportedJason Ekstrand2016-07-221-2/+5
| | | | | | Signed-off-by: Jason Ekstrand <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Cc: "12.0" <[email protected]>
* anv/pipeline: Set binding_table.gather_texture_startJason Ekstrand2016-07-221-0/+1
| | | | | | | | This should get texture gather working on gen8+ and mostly working on gen7. Signed-off-by: Jason Ekstrand <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Cc: "12.0" <[email protected]>
* anv: Properly call gen75_emit_state_base_address on Haswell.Kenneth Graunke2016-07-201-1/+1
| | | | | | | | | | This should fix MOCS values. Caught by Coverity. CID: 1364155 Cc: "12.0" <[email protected]> Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* genxml: Rename "API Rendering Disable" to "Rendering Disable".Kenneth Graunke2016-07-202-2/+2
| | | | | | | | | | Gen7/7.5 call it "Rendering Disable" while Gen8/9 prefix it with "API". Pick one for consistency, and so we can share code between generations. Cc: "12.0" <[email protected]> Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* anv: Unify 3DSTATE_CLIP code across generations.Kenneth Graunke2016-07-203-43/+41
| | | | | | | | | | The bulk of this is the same. There are just a couple fields that only exist on one generation or another, and we can easily handle those with an #ifdef. Cc: "12.0" <[email protected]> Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* anv: Enable early culling on Gen7.Kenneth Graunke2016-07-201-0/+1
| | | | | | | | We set the cull mode, but forgot the enable bit. Gen8 uses this. Cc: "12.0" <[email protected]> Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* anv: Fix near plane clipping on Gen7/7.5.Kenneth Graunke2016-07-201-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Gen7/7.5 clip code used APIMODE_OGL, while the Gen8+ clip code used APIMODE_D3D. The meaning hasn't changed, so one of these must be wrong. It appears that the hardware documentation is completely wrong. It claims that the "API Mode" bit means: 0h APIMODE_OGL NEAR_VP boundary == 0.0 (NDC) 1h APIMODE_D3D NEAR_VP boundary == -1.0 (NDC) However, DirectX typically uses 0.0 for the near plane, while unextended OpenGL uses -1.0. i965's gen6_clip_state.c uses APIMODE_D3D for the GL_ZERO_TO_ONE case, so I believe the meanings are backwards from what the documentation says. Section 23.2 ("Primitive Clipping") of the Vulkan 1.0.21 specification contains the following equations: -w_c <= x_c <= w_c -w_c <= y_c <= w_c 0 <= z_c <= w_c This means that Vulkan follows D3D semantics. Cc: "12.0" <[email protected]> Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* genxml: Add APIMODE_D3D missing enum values and improve consistency.Kenneth Graunke2016-07-206-3/+8
| | | | | | Cc: "12.0" <[email protected]> Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* genxml: Add CLIPMODE_* prefix to 3DSTATE_CLIP's "Clip Mode" enum values.Kenneth Graunke2016-07-203-7/+7
| | | | | | | | | Gen6-7.5 use CLIPMODE_REJECT_ALL, while Gen8+ just used REJECT_ALL. Being consistent will let me unify code, and I prefer having the prefix. Cc: "12.0" <[email protected]> Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* compiler: Rename INTERP_QUALIFIER_* to INTERP_MODE_*.Kenneth Graunke2016-07-173-6/+6
| | | | | | | | | | | | | | | | | Likewise, rename the enum type to glsl_interp_mode. Beyond the GLSL front-end, talking about "interpolation modes" seems more natural than "interpolation qualifiers" - in the IR, we're removed from how exactly the source language specifies how to interpolate an input. Also, SPIR-V calls these "decorations" rather than "qualifiers". Generated by: $ find . -regextype egrep -regex '.*\.(c|cpp|h)' -type f -exec sed -i \ -e 's/INTERP_QUALIFIER_/INTERP_MODE_/g' \ -e 's/glsl_interp_qualifier/glsl_interp_mode/g' {} \; Signed-off-by: Kenneth Graunke <[email protected]> Acked-by: Dave Airlie <[email protected]>
* isl/state: Add support for OffsetX/Y in surface stateJason Ekstrand2016-07-152-0/+31
| | | | | Signed-off-by: Jason Ekstrand <[email protected]> Reviewed-by: Chad Versace <[email protected]>
* isl: Add support for filling out surface states all the way back to gen4Jason Ekstrand2016-07-156-5/+182
| | | | | Signed-off-by: Jason Ekstrand <[email protected]> Reviewed-by: Chad Versace <[email protected]>
* isl: Add an ISL_DEV_IS_G4X macroJason Ekstrand2016-07-151-0/+4
| | | | | Signed-off-by: Jason Ekstrand <[email protected]> Reviewed-by: Chad Versace <[email protected]>
* genxml: Add macros and #includes for gens 4-6Jason Ekstrand2016-07-152-2/+23
| | | | | Signed-off-by: Jason Ekstrand <[email protected]> Reviewed-by: Chad Versace <[email protected]>
* genxml: Make X/Y Offset field of SURFACE_STATE a uintJason Ekstrand2016-07-157-14/+14
| | | | | | | | | | | THe offset type has special implications that it's intended to be some form of aligned memory address. These assumptions allow it to handle the case where there is some alignment requirement on the offset and the bottom bits are used for other things. However, the offsets in the surface state field are really just unsigned integers. Signed-off-by: Jason Ekstrand <[email protected]> Reviewed-by: Chad Versace <[email protected]>
* genxml: Add enough XML for gens 4, 4.5, and 5 to get SURFACE_STATEJason Ekstrand2016-07-156-0/+185
| | | | | Signed-off-by: Jason Ekstrand <[email protected]> Acked-by: Chad Versace <[email protected]>
* isl/state: Divide the aux qpitch by 4Jason Ekstrand2016-07-151-1/+1
| | | | | | | | The field is in multiples of 4 like regular QPitch. Signed-off-by: Jason Ekstrand <[email protected]> Reviewed-by: Topi Pohjolainen <[email protected]> Reviewed-by: Chad Versace <[email protected]>
* isl: Fix the bs assertion in isl_tiling_get_infoJason Ekstrand2016-07-151-2/+5
| | | | | Signed-off-by: Jason Ekstrand <[email protected]> Reviewed-by: Chad Versace <[email protected]>
* anv: Handle VK_WHOLE_SIZE properly for buffer viewsJason Ekstrand2016-07-151-3/+4
| | | | | | | | | | | | The old calculation, which used view->offset, encorporated buffer->offset into the size calculation where it doesn't belong. This meant that, if buffer->offset > buffer->size, you would always get a negative size. This fixes 170 dEQP-VK.renderpass.attachment.* Vulkan CTS tests on Haswell. Signed-off-by: Jason Ekstrand <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Nanley Chery <[email protected]> Cc: "12.0" <[email protected]>
* anv: Add an align_down_npot_u32 helperJason Ekstrand2016-07-151-0/+6
| | | | | Signed-off-by: Jason Ekstrand <[email protected]> Cc: "12.0" <[email protected]>
* anv: Enable independentBlend on gen7Jason Ekstrand2016-07-151-1/+1
| | | | | | | | | We can totally do it, we were just only setting up one BLEND_STATE and, now that the code is unified with gen8, we should be handling it correctly. Signed-off-by: Jason Ekstrand <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Cc: "12.0" <[email protected]>
* anv/pipeline: Unify blend state setup between gen7 and gen8Jason Ekstrand2016-07-153-190/+136
| | | | | | | | | This fixes all 674 broken dEQP-VK.pipeline.blend Vulkan CTS tests on Haswell. Signed-off-by: Jason Ekstrand <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Cc: "12.0" <[email protected]>
* genxml: Make gen6-7 blending look more like gen8Jason Ekstrand2016-07-154-15/+34
| | | | | | | | | | This renames BLEND_STATE to BLEND_STATE_ENTRY and adds an new struct BLEND_STATE which is just an array of 8 BLEND_STATE_ENTRYs. This will make it much easier to write gen-agnostic blend handling code. Signed-off-by: Jason Ekstrand <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Cc: "12.0" <[email protected]>
* Revert "isl: Don't filter tiling flags if a specific tiling bit is set"Nanley Chery2016-07-151-8/+5
| | | | | | | | | | This reverts commit 091f1da902c71ac8d3d27b325a118e2f683f1ae5 . Although a user may specify a specfic tiling bit, ISL should still prevent incompatible tiling/surface combinations. Signed-off-by: Nanley Chery <[email protected]> Reviewed-by: Chad Versace <[email protected]>
* anv/blit2d: Copy with stencil sources when neededNanley Chery2016-07-151-3/+14
| | | | | | | | | | In the next patch, ISL will unconditionally perform verification of a surface's tiling and usage. Since it will require that w-tiled images be stencil buffers, create a stencil surface to copy from a w-tiled/stencil surface. Signed-off-by: Nanley Chery <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* anv/image: Fix initialization of the ISL tilingNanley Chery2016-07-152-4/+14
| | | | | | | | | | | | | | | If an internal user creates an image with Vulkan tiling VK_IMAGE_TILING_OPTIMAL and an ISL tiling that isn't set, ISL will fail to create the image as anv_image_create_info::isl_tiling_flags will be an invalid value. Correct this by making anv_image_create_info::isl_tiling_flags an opt-in, filtering bitmask, that allows the caller to specify which ISL tilings are acceptable, but not contradictory to the Vulkan tiling. Opt-out of filtering for vkCreateImage. Signed-off-by: Nanley Chery <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* isl: Fix isl_tiling_is_any_y()Nanley Chery2016-07-151-1/+1
| | | | | | | Cc: 12.0 <[email protected]> Signed-off-by: Nanley Chery <[email protected]> Reviewed-by: Chad Versace <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* anv/device: Fix max buffer range limitsNanley Chery2016-07-151-2/+6
| | | | | | | | | | | | | | | | Set limits that are consistent with ISL's assertions in isl_genX(buffer_fill_state_s)() and Anvil's format-DescriptorType mapping in anv_isl_format_for_descriptor_type(). Fixes the following new crucible tests: * stress.limits.buffer-update.range.uniform * stress.limits.buffer-update.range.storage These tests are in this patch: https://patchwork.freedesktop.org/patch/98726/ Cc: 12.0 <[email protected]> Signed-off-by: Nanley Chery <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* isl: Fix assert on raw buffer surface state sizeNanley Chery2016-07-151-1/+8
| | | | | | | | See inline PRM reference. Cc: 12.0 <[email protected]> Signed-off-by: Nanley Chery <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* anv/cmd_buffer: Simplify range member assignmentNanley Chery2016-07-151-4/+2
| | | | | | | | A ternary is clearer because the range member is assigned one of two values dependant on one condition. Signed-off-by: Nanley Chery <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* anv/cmd_buffer: Remove unused variableNanley Chery2016-07-151-2/+1
| | | | | | | This became unused due to commit 612e35b2c65c99773b73e53d0e6fd112b1a7431f . Signed-off-by: Nanley Chery <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* anv/descriptor_set: Fix binding partly undefined descriptor setsNanley Chery2016-07-151-0/+5
| | | | | | | | | | | | | | | | Section 13.2.3. of the Vulkan spec requires that implementations be able to bind sparsely-defined Descriptor Sets without any errors or exceptions. When binding a descriptor set that contains a dynamic buffer binding/descriptor, the driver attempts to dereference the descriptor's buffer_view field if it is non-NULL. It currently segfaults on undefined descriptors as this field is never zero-initialized. Zero undefined descriptors to avoid segfaulting. This solution was suggested by Jason Ekstrand. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=96850 Cc: 12.0 <[email protected]> Signed-off-by: Nanley Chery <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* anv: Add a stub for CmdCopyQueryPoolResults on Ivy BridgeJason Ekstrand2016-07-131-0/+13
| | | | | Signed-off-by: Jason Ekstrand <[email protected]> Cc: "12.0" <[email protected]>
* isl/state: Add support for handling auxiliary surfacesJason Ekstrand2016-07-132-2/+48
| | | | | Reviewed-by: Topi Pohjolainen <[email protected]> Reviewed-by: Chad Versace <[email protected]>
* isl: Add an auxiliary surface usage enumJason Ekstrand2016-07-131-0/+26
| | | | Reviewed-by: Chad Versace <[email protected]>
* isl: Add support for color control surfacesJason Ekstrand2016-07-136-0/+102
| | | | Reviewed-by: Chad Versace <[email protected]>
* isl: Add support for multisample compression surfacesJason Ekstrand2016-07-133-0/+15
| | | | Reviewed-by: Chad Versace <[email protected]>
* isl: Add support for HiZ surfacesJason Ekstrand2016-07-137-3/+63
| | | | Reviewed-by: Chad Versace <[email protected]>
* isl: Kill off isl_format_layout::bsJason Ekstrand2016-07-137-22/+21
| | | | Reviewed-by: Chad Versace <[email protected]>
* isl: Take bpb rather than bs in tiling_get_infoJason Ekstrand2016-07-132-6/+6
| | | | Reviewed-by: Chad Versace <[email protected]>
* isl: Use bpb in a few places where it's more natural than bsJason Ekstrand2016-07-134-6/+6
| | | | Reviewed-by: Chad Versace <[email protected]>
* isl: Use bpb for determining YUV image paddingJason Ekstrand2016-07-131-1/+1
| | | | | | | When we initially dropped bpb in favor of bs, we accidentally didn't change this one line properly. This brings it back to what it should be. Reviewed-by: Chad Versace <[email protected]>
* isl: Bring back isl_format_layout::bpbJason Ekstrand2016-07-132-2/+4
| | | | | | | | A while ago we got rid of the bits-per-block because we thought we didn't need it. We're about to introduce some very useful 1 and 2-bit formats so we really should be able to handle them again. Reviewed-by: Chad Versace <[email protected]>
* isl: Change the physical size of a W-tile to 128x32Jason Ekstrand2016-07-134-19/+15
| | | | Reviewed-by: Chad Versace <[email protected]>
* isl: Rework the way we define tile sizes.Jason Ekstrand2016-07-132-81/+137
| | | | | | | | | | | This is based on a very long set of discussions between Chad and myself about how we should properly represent HiZ and CCS buffers. The end result of that discussion was that a tiling actually has two different sizes, a logical size in elements, and a physical size in bytes and rows. This commit reworks ISL's pitch and size calculations to work in terms of these two sizes. Reviewed-by: Chad Versace <[email protected]>
* isl: Rework the way we handle surface paddingJason Ekstrand2016-07-131-27/+25
| | | | Reviewed-by: Chad Versace <[email protected]>
* isl: Use ARRAY_PITCH_SPAN_FULL for depth/stencil surfaces on gen7Jason Ekstrand2016-07-131-1/+1
| | | | | | | We helpfully inserted a PRM quotation about how we need to use ARRAY_PITCH_SPAN_FULL and then set it to COMPACT. Oops... Reviewed-by: Chad Versace <[email protected]>
* isl: Stop multiplying height by block sizeJason Ekstrand2016-07-131-2/+2
| | | | | | | | The row pitch already specifies the size of a row of elements. Multiplying by the block height simply causes us to allocate as muc as 12 times more memory than needed for compressed textures. Reviewed-by: Chad Versace <[email protected]>
* isl: Get rid of tiling_get_extentJason Ekstrand2016-07-132-17/+0
| | | | | | It was unused Reviewed-by: Chad Versace <[email protected]>
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