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* python: Fix rich comparisonsMathieu Bridon2018-08-071-2/+3
* intel: don't build tools without -Dtools=intelLionel Landwerlin2018-08-072-15/+15
* anv: add more swapchain formatsTapani Pälli2018-08-061-5/+11
* intel: tools: simplify meson buildLionel Landwerlin2018-08-041-46/+50
* intel: aubinator: simplify decodingLionel Landwerlin2018-08-041-10/+5
* intel: common: add missing stdint includeLionel Landwerlin2018-08-041-0/+2
* intel: decoder: remove unused variableLionel Landwerlin2018-08-041-2/+0
* intel: tools: aubwrite: reuse canonical address helperLionel Landwerlin2018-08-041-17/+2
* intel: aubinator: fix read the context/ringLionel Landwerlin2018-08-041-2/+2
* anv/pipeline: Disable FS dispatch for pointless fragment shadersJason Ekstrand2018-08-031-4/+33
* intel/tools: add error2aub creation into autotoolsAndres Gomez2018-08-021-1/+23
* anv/pipeline: Do cross-stage linking optimizationsJason Ekstrand2018-08-021-0/+11
* anv/pipeline: Pull most of the anv_pipeline_compile_* into common codeJason Ekstrand2018-08-021-215/+92
* anv/pipeline: Add a separate "link" stageJason Ekstrand2018-08-021-128/+193
* anv/pipeline: Compile to NIR in compile_graphicsJason Ekstrand2018-08-021-161/+116
* anv/pipeline: Recompile all shaders if any are missing from the cacheJason Ekstrand2018-08-021-4/+37
* anv/pipeline: Drop anv_pipeline_add_compiled_stageJason Ekstrand2018-08-022-19/+10
* anv/pipeline: Pull shader compilation out into a helper.Jason Ekstrand2018-08-021-108/+120
* anv/pipeline: Call anv_pipeline_compile_* in a loopJason Ekstrand2018-08-021-26/+30
* anv/pipeline: Hash the entire pipeline in one goJason Ekstrand2018-08-021-53/+94
* anv/pipeline: Populate keys up-frontJason Ekstrand2018-08-021-55/+60
* anv/pipline: Add a helper struct for per-stage infoJason Ekstrand2018-08-022-95/+74
* intel/compiler: Add brw_get_compiler_config_value for disk cacheJordan Justen2018-08-013-1/+41
* i965: Disable shader cache with INTEL_DEBUG=shader_timeJordan Justen2018-08-011-2/+5
* anv/pipeline: Add populate_tcs/tes_key helpersJason Ekstrand2018-08-011-3/+25
* anv/pipeline: Rework the parameters to populate_wm_prog_keyJason Ekstrand2018-08-011-22/+24
* anv/pipeline: More aggressively optimize away color attachmentsJason Ekstrand2018-08-012-5/+14
* anv: Restrict the number of color regions to those actually writtenJason Ekstrand2018-08-011-0/+5
* anv/pipeline: Fix up deref modes if we delete a FS outputJason Ekstrand2018-08-011-0/+5
* intel/nir: Call nir_lower_io_to_scalar_earlyJason Ekstrand2018-08-011-5/+12
* intel/nir: Split IO arrays into elementsJason Ekstrand2018-08-011-0/+4
* i965/fs: Flag all slots of a flat input as flatJason Ekstrand2018-08-011-6/+9
* intel/nir: Use the correct scalar stage for consumers when linkingJason Ekstrand2018-08-011-1/+1
* intel: tools: aubwrite: split gen[89] from gen10+Lionel Landwerlin2018-08-015-186/+416
* python: Explicitly use byte stringsMathieu Bridon2018-08-011-2/+2
* python: Open file in binary modeMathieu Bridon2018-08-011-1/+1
* python: Better get character ordinalsMathieu Bridon2018-08-011-2/+2
* intel/compiler: implement 8-bit constant loadIago Toral Quiroga2018-08-011-0/+5
* intel/compiler: add setup_imm_(u)b helpersIago Toral Quiroga2018-08-012-0/+22
* i965/icl: Disable binding table prefetchingTopi Pohjolainen2018-07-271-0/+7
* intel/compiler: fix lower conversions to account for predicationIago Toral Quiroga2018-07-271-1/+4
* i965: Combine both gl_PatchVerticesIn lowering passes.Kenneth Graunke2018-07-262-4/+2
* intel/compiler: Delete dead VS intrinsic handling.Kenneth Graunke2018-07-261-12/+4
* anv: drop unused local varsEric Engestrom2018-07-261-6/+0
* anv: remove incorrect `UNUSED` flagEric Engestrom2018-07-261-1/+1
* intel: Make the decoder just store addresses for bases, not buffers.Kenneth Graunke2018-07-252-12/+12
* intel: Make the decoder handle STATE_BASE_ADDRESS not being a buffer.Kenneth Graunke2018-07-252-38/+46
* anv: don't crash on vkDestroyDevice(NULL)Eric Engestrom2018-07-251-1/+3
* anv: fix python whitespace warningEric Engestrom2018-07-251-1/+1
* anv: cleanup python importsEric Engestrom2018-07-252-3/+3
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