summaryrefslogtreecommitdiffstats
path: root/src/intel
Commit message (Expand)AuthorAgeFilesLines
* anv: Disable constant buffer 0 being relative.Rafael Antognolli2018-06-182-1/+29
* anv/device: Check for kernel support of context isolation.Rafael Antognolli2018-06-182-0/+4
* intel/genxml: Add bitmasks for CS_DEBUG_MODE2/INSTPM.Rafael Antognolli2018-06-187-0/+32
* meson: fix i965/anv/isl genX static lib namesEric Engestrom2018-06-182-2/+2
* intel/fs: shuffle_64bit_data_for_32bit_write is not used anymoreJose Maria Casanova Crespo2018-06-162-36/+0
* intel/fs: Use new shuffle_32bit_write for all 64-bit storage writesJose Maria Casanova Crespo2018-06-161-7/+6
* intel/fs: shuffle_32bit_load_result_to_64bit_data is not used anymoreJose Maria Casanova Crespo2018-06-162-58/+0
* intel/fs: Use shuffle_from_32bit_read for 64-bit FS load_inputJose Maria Casanova Crespo2018-06-161-4/+4
* intel/fs: shuffle_from_32bit_read at load_per_vertex_input at TCS/TESJose Maria Casanova Crespo2018-06-161-14/+8
* intel/fs: Use shuffle_from_32bit_read at VS load_inputJose Maria Casanova Crespo2018-06-161-10/+5
* intel/fs: Use shuffle_from_32bit_read for 64-bit gs_input_loadJose Maria Casanova Crespo2018-06-161-5/+5
* intel/fs: shuffle_from_32bit_read for 64-bit do_untyped_vector_readJose Maria Casanova Crespo2018-06-161-10/+2
* intel/fs: Remove old 16-bit shuffle/unshuffle functionsJose Maria Casanova Crespo2018-06-162-73/+0
* intel/fs: Use shuffle_for_32bit_write for 16-bits store_ssboJose Maria Casanova Crespo2018-06-161-5/+2
* intel/fs: Use shuffle_from_32bit_read to read 16-bit SSBOJose Maria Casanova Crespo2018-06-161-4/+2
* intel/fs: Use shuffle_from_32bit_read at VARYING_PULL_CONSTANT_LOADJose Maria Casanova Crespo2018-06-161-15/+2
* intel/fs: New shuffle_for_32bit_write and shuffle_from_32bit_readJose Maria Casanova Crespo2018-06-162-0/+54
* intel/fs: general 8/16/32/64-bit shuffle_src_to_dst functionJose Maria Casanova Crespo2018-06-161-0/+101
* i965/fs: Propagate conditional modifiers from not instructionsIan Romanick2018-06-151-1/+61
* i965/fs: Rearrange code to remove most of the gotosIan Romanick2018-06-151-11/+3
* i965/fs: Refactor propagation of conditional modifiers from compares to addsIan Romanick2018-06-151-57/+80
* i965/vec4: Optimize OR with 0 into a MOVIan Romanick2018-06-151-0/+8
* i965/vec4: Don't register coalesce into source of VS_OPCODE_UNPACK_FLAGS_SIMD4X2Ian Romanick2018-06-151-0/+9
* i965/fs: Optimize OR with 0 into a MOVIan Romanick2018-06-151-1/+2
* intel/aubinator: Use int to store getopt_long flags.Rafael Antognolli2018-06-151-2/+2
* intel/compiler: Properly consider UBO loads that cross 32B boundaries.Kenneth Graunke2018-06-141-2/+14
* anv: reduce maxFragmentInputComponentsSamuel Iglesias Gonsálvez2018-06-141-1/+1
* Revert "intel/compiler: Properly consider UBO loads that cross 32B boundaries."Jason Ekstrand2018-06-131-7/+1
* intel/compiler: Properly consider UBO loads that cross 32B boundaries.Kenneth Graunke2018-06-131-1/+7
* anv/android: Use an address for each anv_image planeMauro Rossi2018-06-121-2/+2
* anv/android: Set the BO flags in bo_cache_import (v2)Mauro Rossi2018-06-121-1/+7
* anv: Disable __gen_validate_value if NDEBUG is set.Kenneth Graunke2018-06-111-0/+2
* anv: enable VK_EXT_shader_stencil_exportGustavo Lima Chaves2018-06-083-0/+3
* intel/isl: Add bounds-checking assertions for the format_info tableJason Ekstrand2018-06-071-8/+16
* intel/isl: Add bounds-checking assertions in isl_format_get_layoutJason Ekstrand2018-06-072-12/+22
* anv: Set fence/semaphore types to NONE in impl_cleanupJason Ekstrand2018-06-071-13/+16
* intel/blorp: Emit VF cache invalidates for 48-bit bugs with softpin.Kenneth Graunke2018-06-062-5/+22
* intel/blorp: Don't vertex fetch directly from clear valuesJason Ekstrand2018-06-061-44/+41
* intel/eu: Use a struct copy instead of a memcpyJason Ekstrand2018-06-051-1/+1
* intel/tools: add intel_sanitize_gpu to EXTRA_DISTScott D Phillips2018-06-051-0/+2
* anv: intel: add softpin flag on imported BOsLionel Landwerlin2018-06-051-0/+2
* intel/eu: Switch to a logical state stackJason Ekstrand2018-06-043-126/+72
* intel/eu: Set flag [sub]register number differently for 3srcJason Ekstrand2018-06-041-3/+10
* intel/eu: Copy fields manually in brw_next_insnJason Ekstrand2018-06-041-1/+94
* intel/eu: Add some brw_get_default_ helpersJason Ekstrand2018-06-044-55/+79
* anv: Don't even bother processing relocs if we have softpinJason Ekstrand2018-06-011-3/+15
* anv: Refactor reloc handling in execbuf_add_boJason Ekstrand2018-06-011-36/+42
* anv: Assert that the kernel leaves pinned BO addresses aloneJason Ekstrand2018-06-011-1/+4
* anv: Soft-pin everything elseScott D Phillips2018-06-013-1/+21
* anv: Soft-pin batch buffersScott D Phillips2018-06-014-11/+30