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* intel/isl/format: Add an srgb_to_linear helperJason Ekstrand2017-07-222-1/+53
| | | | Reviewed-by: Topi Pohjolainen <[email protected]>
* intel/isl/format: Dedent the template in gen_format_layout.pyJason Ekstrand2017-07-221-58/+57
| | | | | | | This makes it much easier to edit the template and doesn't really dirty the python all that much. Reviewed-by: Topi Pohjolainen <[email protected]>
* intel/isl: Add an aux state for "partial clear"Jason Ekstrand2017-07-221-35/+53
| | | | Reviewed-by: Topi Pohjolainen <[email protected]>
* intel/blorp: Add a partial resolve pass for MCSJason Ekstrand2017-07-224-1/+213
| | | | Reviewed-by: Topi Pohjolainen <[email protected]>
* anv: Predicate fast-clear resolvesNanley Chery2017-07-223-16/+120
| | | | | | | | | | | | | | | Image layouts only let us know that an image *may* be fast-cleared. For this reason we can end up with redundant resolves. Testing has shown that such resolves can measurably hurt performance and that predicating them can avoid the penalty. v2: - Introduce additional resolve state management function (Jason Ekstrand). - Enable easy retrieval of fast clear state fields. v3: Use more descriptive field enums (Jason) Signed-off-by: Nanley Chery <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* intel/blorp: Allow BLORP calls to be predicatedNanley Chery2017-07-222-0/+6
| | | | | Signed-off-by: Nanley Chery <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* anv/cmd_buffer: Skip some input attachment transitionsNanley Chery2017-07-221-5/+26
| | | | | Signed-off-by: Nanley Chery <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* anv: Stop resolving CCS implicitlyNanley Chery2017-07-223-169/+5
| | | | | | | | | With an earlier patch from this series, resolves are additionally performed on layout transitions. Remove the now unnecessary implicit resolves within render passes. Signed-off-by: Nanley Chery <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* anv: Transition more color buffer layoutsNanley Chery2017-07-222-28/+169
| | | | | | | | | | | v2: Expound on comment for the pipe controls (Jason Ekstrand). v3: - Cast base_layer to uint64_t to avoid overflow. - Remove "seems" from the pipe control comment. - Fix clamp of layer_count (Jason Ekstrand). Signed-off-by: Nanley Chery <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* anv/cmd_buffer: Warn about not enabling CCS_ENanley Chery2017-07-221-5/+7
| | | | | | | | Use the performance warning infrastructure to provide helpful information when testing applications. Signed-off-by: Nanley Chery <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* anv/cmd_buffer: Move aux_usage assignment upNanley Chery2017-07-221-32/+30
| | | | | | | | For readability, bring the assignment of CCS closer to the assignment of NONE and MCS. Signed-off-by: Nanley Chery <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* anv/cmd_buffer: Always enable CCS_D in render passesNanley Chery2017-07-222-11/+20
| | | | | | | | | | | | The lifespan of the fast-clear data will surpass the render pass scope. We need CCS_D to be enabled in order to invalidate blocks previously marked as cleared and to sample cleared data correctly. v2: Avoid refactoring. v3: Allow CCS_D for subpass resolves. Signed-off-by: Nanley Chery <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* anv/cmd_buffer: Disable CCS on gen7 color attachments upfrontNanley Chery2017-07-221-11/+5
| | | | | | | | | The next patch enables the use of CCS_D even when the color attachment will not be fast-cleared. Catch the gen7 case early to simplify the changes required. Signed-off-by: Nanley Chery <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* anv/cmd_buffer: Ensure fast-clear values are currentNanley Chery2017-07-221-0/+114
| | | | | | | v2: Rewrite functions, change location of synchronization. Signed-off-by: Nanley Chery <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* anv/gpu_memcpy: Add a lighter-weight GPU memcpy functionNanley Chery2017-07-222-0/+45
| | | | | | | | | | | | | | | | We'll be performing a GPU memcpy in more places to copy small amounts of data. Add an alternate function that thrashes less state. v2: - Make a new function (Jason Ekstrand). - Move the #define into the function. v3: - Update the function name (Jason). - Update comments. v4: Use an indirect drawing register as TEMP_REG (Jason Ekstrand). Signed-off-by: Nanley Chery <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* anv/cmd_buffer: Restrict fast clears in the GENERAL layoutNanley Chery2017-07-223-0/+40
| | | | | | | | | v2: Remove ::first_subpass_layout assertion (Jason Ekstrand). v3: Allow some fast clears in the GENERAL layout. v4: Remove extra '||' and adjust line break (Jason Ekstrand). Signed-off-by: Nanley Chery <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* anv/cmd_buffer: Don't partially fast clear image layersNanley Chery2017-07-221-8/+23
| | | | | | | | v2: Don't pass in the command buffer (Jason Ekstrand). v3: Remove an incorrect assertion and an if condition for gen7. Signed-off-by: Nanley Chery <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* anv/cmd_buffer: Initialize the clear values bufferNanley Chery2017-07-221-1/+78
| | | | | | | | | | v2: Rewrite functions. v3 (Jason Ekstrand): - Don't set ResourceMinLOD. - Fix clamp of level_count. Signed-off-by: Nanley Chery <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* anv/image: Append CCS/MCS with a fast-clear state bufferNanley Chery2017-07-222-0/+90
| | | | | | | v2: Update comments, function signatures, and add assertions. Signed-off-by: Nanley Chery <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* anv/image: Disable CCS if the image doesn't support renderingNanley Chery2017-07-221-0/+15
| | | | | Signed-off-by: Nanley Chery <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* intel/isl: Add surface state clear value informationNanley Chery2017-07-222-0/+13
| | | | | | | | This will be used to load and store clear values from surface state objects. Signed-off-by: Nanley Chery <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* anv: Transition MCS buffers from the undefined layoutNanley Chery2017-07-223-18/+35
| | | | | | | | v2: Define MCS buffers with any sample count (Jason) Cc: <[email protected]> Suggested-by: Jason Ekstrand <[email protected]> Signed-off-by: Nanley Chery <[email protected]>
* intel/isl: Tighten up restrictions for CCS on gen7Jason Ekstrand2017-07-221-7/+23
| | | | | | | | | | It may technically be possible to enable some sort of fast-clear support for at least the base slice of a 2D array texture on gen7. However, it's not documented to work, we've never tried to do it in GL, and we have no idea what the hardware does if you turn on CCS_D with arrayed rendering. Let's just play it safe and disallow it for now. If someone really cares that much about gen7 performance, they can come along and try to get it working later.
* anv/blorp: Assert isl_surf_init success in do_buffer_copyJason Ekstrand2017-07-221-13/+15
| | | | Reviewed-by: Topi Pohjolainen <[email protected]>
* anv/blorp: Explicitly set row_pitch in do_buffer_copyJason Ekstrand2017-07-221-1/+1
| | | | | | | | We have a very specific row pitch that we want and we don't want ISL to be changing it on us so just be explicit about it. Fixes: a40f0430347c07bf2d5794642fe02f5dd248a473 Reviewed-by: Topi Pohjolainen <[email protected]>
* i965: Set lower_vote_trivial in vector_nir_options_gen6 too.Kenneth Graunke2017-07-211-0/+1
| | | | | | There's a second struct for Gen6+. Reviewed-by: Matt Turner <[email protected]>
* intel/isl/gen7: Don't allow multisampled surfaces with valign2Topi Pohjolainen2017-07-221-19/+23
| | | | | | | | | | | | | | | | | There is the same constraintg later on as assert in isl_gen7_choose_image_alignment_el() so catch it earlier in order to return error instead of crash. Needed to avoid crashes with piglits on IVB and HSW: arb_internalformat_query2.image_format_compatibility_type pname checks arb_internalformat_query2.all internalformat_<x>_type pname checks arb_internalformat_query2.max dimensions related pname checks arb_copy_image.arb_copy_image-formats --samples=2/4/6/8 arb_texture_float.multisample-fast-clear gl_arb_texture_float Reviewed-by: Jason Ekstrand <[email protected]> Signed-off-by: Topi Pohjolainen <[email protected]>
* intel/isl/gen7: Allow msaa with signed integer formatsTopi Pohjolainen2017-07-221-2/+3
| | | | | | | | | | | | | These formats are already allowed by the i965 GL driver, and the feature seems to work just fine. There are tests for multisampled rendering in piglit: tests/spec/ext_framebuffer_multisample which can be patched to try 16I/32I in addition to GL_RGBA8I. IvyBridge passed all tests with all sample numbers. Reviewed-by: Jason Ekstrand <[email protected]> Signed-off-by: Topi Pohjolainen <[email protected]>
* intel/isl/gen7: Allow msaa with 128-bit formatsTopi Pohjolainen2017-07-221-4/+7
| | | | | | | | | | | | | | These formats are already allowed by the i965 GL driver, and the feature seems to work just fine. There are tests for multisampled rendering in piglit: tests/spec/ext_framebuffer_multisample which can be patched to try GL_RGBA16F/32F/16I/16UI/32I/32UI in addition to GL_RGBA/8I. IvyBridge passed all tests with all sample numbers and even with 128-bit formats. Reviewed-by: Jason Ekstrand <[email protected]> Signed-off-by: Topi Pohjolainen <[email protected]>
* intel/isl: Allow 1D surfaces with compressed formatsTopi Pohjolainen2017-07-221-1/+1
| | | | | Reviewed-by: Jason Ekstrand <[email protected]> Signed-off-by: Topi Pohjolainen <[email protected]>
* intel/isl: Align non-tiled horizontally by cache lineTopi Pohjolainen2017-07-221-1/+15
| | | | | | | in order to support blit engine. Reviewed-by: Jason Ekstrand <[email protected]> Signed-off-by: Topi Pohjolainen <[email protected]>
* i965/fs: Match destination type to size for ballotMatt Turner2017-07-202-2/+6
| | | | No use in taking a 64-bit value when we know the high 32-bits are zero.
* nir: Reduce destination size of ballot intrinsic when possibleMatt Turner2017-07-201-0/+1
| | | | | | | | | Some hardware, like i965, doesn't support group sizes greater than 32. In that case, we can reduce the destination size of the ballot intrinsic, which will simplify our code generation. Reviewed-by: Connor Abbott <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965/fs: Implement ARB_shader_ballot operationsMatt Turner2017-07-203-0/+48
| | | | Reviewed-by: Kenneth Graunke <[email protected]>
* i965/fs: Do not move MOVs writing the flag outside of control flowMatt Turner2017-07-201-2/+4
| | | | | | | | | | | | | | | | | | | The implementation of ballotARB() will start by zeroing the flags register. So, a doing something like if (gl_SubGroupInvocationARB % 2u == 0u) { ... = ballotARB(true); [...] } else { ... = ballotARB(true); [...] } (like fs-ballot-if-else.shader_test does) would generate identical MOVs to the same destination (the flag register!), and we definitely do not want to pull that out of the control flow. Reviewed-by: Kenneth Graunke <[email protected]>
* i965/fs: Handle explicit flag sources in flags_read()Francisco Jerez2017-07-201-4/+5
| | | | | | | The implementations of the ARB_shader_ballot intrinsics will explicitly read the flag as a source register. Reviewed-by: Matt Turner <[email protected]>
* nir: Add system values from ARB_shader_ballotMatt Turner2017-07-202-3/+3
| | | | | | | | | | | | | We already had a channel_num system value, which I'm renaming to subgroup_invocation to match the rest of the new system values. Note that while ballotARB(true) will return zeros in the high 32-bits on systems where gl_SubGroupSizeARB <= 32, the gl_SubGroup??MaskARB variables do not consider whether channels are enabled. See issue (1) of ARB_shader_ballot. Reviewed-by: Connor Abbott <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965/fs: Implement ARB_shader_group_vote operationsMatt Turner2017-07-201-0/+50
| | | | Reviewed-by: Kenneth Graunke <[email protected]>
* i965/fs: Handle explicit flag destinations in flags_written()Francisco Jerez2017-07-201-4/+19
| | | | | | | The implementations of the ARB_shader_group_vote intrinsics will explicitly write the flag as the destination register. Reviewed-by: Matt Turner <[email protected]>
* i965/vec4: Lower ARB_shader_group_vote intrinsicsMatt Turner2017-07-201-0/+1
| | | | | | | | I don't expect anyone is going to care about using this in vec4 programs (vertex/tessellation/geometry on Gen6/7), no one has come up with a good way to implement it much less test it. Reviewed-by: Kenneth Graunke <[email protected]>
* nir: Add pass to optimize intrinsicsMatt Turner2017-07-201-0/+1
| | | | | | | Specifically, constant fold intrinsics from ARB_shader_group_vote, but I suspect it'll be useful for other things in the future. Reviewed-by: Kenneth Graunke <[email protected]>
* intel/isl/gen4: Represent cube maps with 3D layoutTopi Pohjolainen2017-07-201-6/+35
| | | | | | | v2 (Jason): Check for !ISL_SURF_DIM_3D instead of CUBE_BIT. Reviewed-by: Jason Ekstrand <[email protected]> Signed-off-by: Topi Pohjolainen <[email protected]>
* intel/isl: Add i915 to isl_tiling converterTopi Pohjolainen2017-07-202-0/+20
| | | | | | | | v2: s/i915_tiling_to_isl_tiling(/isl_tiling_from_i915_tiling/ Reviewed-by: Daniel Stone <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]> Signed-off-by: Topi Pohjolainen <[email protected]>
* anv/image: Fix VK_IMAGE_CREATE_CUBE_COMPATIBLE_BITChad Versace2017-07-191-3/+4
| | | | | | | | | | | We incorrectly detected VK_IMAGE_CREATE_CUBE_COMPATIBLE_BIT. We looked for the bit in VkImageCreateInfo::usage, but it's actually in VkImageCreateInfo::flags. Found by assertion failures while enabling VK_ANDROID_native_buffer. Cc: [email protected] Reviewed-by: Lionel Landwerlin <[email protected]>
* intel/blorp/gen4: Drop cube map flag for single face copyTopi Pohjolainen2017-07-181-1/+7
| | | | | | | | This will falsely trigger an assert on number of layers once isl is used for 3D layouts of Gen4 cube maps. Reviewed-by: Jason Ekstrand <[email protected]> Signed-off-by: Topi Pohjolainen <[email protected]>
* intel/isl: Take 3D surfaces into account in image paramsTopi Pohjolainen2017-07-181-2/+6
| | | | | Reviewed-by: Jason Ekstrand <[email protected]> Signed-off-by: Topi Pohjolainen <[email protected]>
* anv: Advertise support for VK_KHR_variable_pointersJason Ekstrand2017-07-183-0/+13
| | | | | | | | We don't support the general version yet because that requires us to lower shared variables up-front in SPIR-V -> NIR. This shouldn't be a whole lot of work but it's not something we support today. Reviewed-by: Iago Toral Quiroga <[email protected]>
* anv: Advertise support for VK_KHR_storage_buffer_storage_classJason Ekstrand2017-07-182-0/+5
| | | | Reviewed-by: Iago Toral Quiroga <[email protected]>
* intel/isl: Add a row_pitch parameter to surf_get_ccs_surfJason Ekstrand2017-07-173-3/+6
| | | | | Reviewed-by: Topi Pohjolainen <[email protected]> Reviewed-by: Chad Versace <[email protected]>
* anv/image: Add INPUT_ATTACHMENT to the list of required usagesJason Ekstrand2017-07-171-0/+1
| | | | | | | | | | | | | | | From the Vulkan 1.0.53 spec VU for vkCreateImageView: "image must have been created with a usage value containing at least one of VK_IMAGE_USAGE_SAMPLED_BIT, VK_IMAGE_USAGE_STORAGE_BIT, VK_IMAGE_USAGE_COLOR_ATTACHMENT_BIT, VK_IMAGE_USAGE_DEPTH_STENCIL_ATTACHMENT_BIT, or VK_IMAGE_USAGE_INPUT_ATTACHMENT_BIT" We were missing VK_IMAGE_USAGE_INPUT_ATTACHMENT_BIT from out list. Reviewed-by: Lionel Landwerlin <[email protected]> Cc: [email protected]
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