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* anv: reduce maxFragmentInputComponentsSamuel Iglesias Gonsálvez2018-06-141-1/+1
* Revert "intel/compiler: Properly consider UBO loads that cross 32B boundaries."Jason Ekstrand2018-06-131-7/+1
* intel/compiler: Properly consider UBO loads that cross 32B boundaries.Kenneth Graunke2018-06-131-1/+7
* anv/android: Use an address for each anv_image planeMauro Rossi2018-06-121-2/+2
* anv/android: Set the BO flags in bo_cache_import (v2)Mauro Rossi2018-06-121-1/+7
* anv: Disable __gen_validate_value if NDEBUG is set.Kenneth Graunke2018-06-111-0/+2
* anv: enable VK_EXT_shader_stencil_exportGustavo Lima Chaves2018-06-083-0/+3
* intel/isl: Add bounds-checking assertions for the format_info tableJason Ekstrand2018-06-071-8/+16
* intel/isl: Add bounds-checking assertions in isl_format_get_layoutJason Ekstrand2018-06-072-12/+22
* anv: Set fence/semaphore types to NONE in impl_cleanupJason Ekstrand2018-06-071-13/+16
* intel/blorp: Emit VF cache invalidates for 48-bit bugs with softpin.Kenneth Graunke2018-06-062-5/+22
* intel/blorp: Don't vertex fetch directly from clear valuesJason Ekstrand2018-06-061-44/+41
* intel/eu: Use a struct copy instead of a memcpyJason Ekstrand2018-06-051-1/+1
* intel/tools: add intel_sanitize_gpu to EXTRA_DISTScott D Phillips2018-06-051-0/+2
* anv: intel: add softpin flag on imported BOsLionel Landwerlin2018-06-051-0/+2
* intel/eu: Switch to a logical state stackJason Ekstrand2018-06-043-126/+72
* intel/eu: Set flag [sub]register number differently for 3srcJason Ekstrand2018-06-041-3/+10
* intel/eu: Copy fields manually in brw_next_insnJason Ekstrand2018-06-041-1/+94
* intel/eu: Add some brw_get_default_ helpersJason Ekstrand2018-06-044-55/+79
* anv: Don't even bother processing relocs if we have softpinJason Ekstrand2018-06-011-3/+15
* anv: Refactor reloc handling in execbuf_add_boJason Ekstrand2018-06-011-36/+42
* anv: Assert that the kernel leaves pinned BO addresses aloneJason Ekstrand2018-06-011-1/+4
* anv: Soft-pin everything elseScott D Phillips2018-06-013-1/+21
* anv: Soft-pin batch buffersScott D Phillips2018-06-014-11/+30
* anv/batch_chain: Simplify secondary batch return chainingJason Ekstrand2018-06-011-40/+36
* anv/batch_chain: Call batch_bo_finish at the end of end_batch_bufferJason Ekstrand2018-06-011-6/+6
* anv: Soft-pin client-allocated memoryJason Ekstrand2018-06-011-0/+3
* anv/allocator: Support softpin in the BO cacheJason Ekstrand2018-06-011-1/+50
* anv/allocator: Set the BO flags in bo_cache_alloc/importJason Ekstrand2018-06-015-28/+60
* anv: For pinned BOs, skip relocations, but track bo usageScott D Phillips2018-06-012-0/+66
* anv: Use a separate pool for binding tables when soft pinningScott D Phillips2018-06-013-11/+53
* anv: Soft-pin state poolsScott D Phillips2018-06-017-10/+34
* i965: Add ARB_fragment_shader_interlock support.Plamena Manolova2018-06-017-6/+34
* anv/blorp: Write relocated values into surface statesScott D Phillips2018-05-313-16/+22
* anv: Use an address for each anv_image planeJason Ekstrand2018-05-315-35/+32
* anv/cmd_buffer: Rework surface relocation helpersJason Ekstrand2018-05-311-25/+19
* anv: Use an anv_address in anv_bufferJason Ekstrand2018-05-319-61/+34
* anv/cmd_buffer: Use anv_address for handling indirect parametersJason Ekstrand2018-05-311-44/+51
* anv: Use an anv_address in anv_buffer_viewJason Ekstrand2018-05-315-27/+36
* anv: Use full anv_addresses in anv_surface_stateJason Ekstrand2018-05-313-51/+55
* anv: Add some anv_address helpersJason Ekstrand2018-05-311-0/+24
* anv: Add vma_heap allocators in anv_deviceScott D Phillips2018-05-312-0/+144
* intel/common: Add an address de-canonicalization helperJason Ekstrand2018-05-311-0/+12
* intel/fs: Add explicit last_rt flag to fb writes orthogonal to eot.Francisco Jerez2018-05-294-5/+5
* intel/fs: Replace the CINTERP opcode with a simple MOVFrancisco Jerez2018-05-295-12/+3
* intel/fs: Use the ATTR file for FS inputsFrancisco Jerez2018-05-294-22/+30
* intel/fs: Rename a local variable so it doesn't shadow component()Francisco Jerez2018-05-291-4/+4
* intel/eu: Remove brw_codegen::compressed_stack.Francisco Jerez2018-05-291-1/+0
* intel/fs: Use groups for SIMD16 LINTERP on gen11+Jason Ekstrand2018-05-291-4/+5
* intel/fs: Assert that the gen4-6 plane restrictions are followedJason Ekstrand2018-05-291-2/+8
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