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* anv/tests: Create a dummy instance as well as deviceJason Ekstrand2017-05-014-4/+16
* anv: Drop 'x11' prefix from non-X11 WSI funcsChad Versace2017-04-281-16/+16
* anv: Alphabetize KHR extensionsJason Ekstrand2017-04-281-18/+18
* anv: Move queues, events, and semaphores to their own fileJason Ekstrand2017-04-273-484/+516
* anv: Implement VK_KHX_external_memory_fdJason Ekstrand2017-04-273-18/+113
* anv: Use the BO cache for DeviceMemory allocationsJason Ekstrand2017-04-275-26/+30
* anv/allocator: Add a BO cacheJason Ekstrand2017-04-272-0/+278
* anv: Implement VK_KHX_external_memoryJason Ekstrand2017-04-272-0/+5
* anv: Implement VK_KHX_external_memory_capabilitiesChad Versace2017-04-274-14/+116
* anv/physical_device: Rename uuid to pipeline_cache_uuidJason Ekstrand2017-04-273-5/+6
* anv: Refactor device_get_cache_uuid into physical_device_init_uuidsJason Ekstrand2017-04-271-13/+17
* anv: Set EXEC_OBJECT_ASYNC when availableJason Ekstrand2017-04-274-0/+10
* anv/cmd_buffer: Use the device allocator for QueueSubmitJason Ekstrand2017-04-271-3/+3
* anv: Don't place scratch buffers above the 32-bit boundaryJason Ekstrand2017-04-271-0/+19
* genxml: Fix gen_pack_header.py crash when field type is invalid.Rafael Antognolli2017-04-241-2/+2
* genxml: Make BLEND_STATE command support variable length array.Rafael Antognolli2017-04-247-48/+74
* genxml: Fix python crash when no dwords are found.Rafael Antognolli2017-04-241-5/+12
* genxml: Remove unused parameter.Rafael Antognolli2017-04-241-2/+2
* intel/aubinator: Correctly read variable length structs.Rafael Antognolli2017-04-243-6/+54
* isl/format: Update the R16G16B16X16_FLOAT entryNanley Chery2017-04-241-1/+1
* anv/pass: Delete anv_pass::subpass_attachmentsNanley Chery2017-04-241-1/+0
* intel/fs: Take into account amount of data read in spilling cost heuristic.Francisco Jerez2017-04-241-1/+1
* intel/fs: Use regs_written() in spilling cost heuristic for improved accuracy.Francisco Jerez2017-04-241-2/+1
* i965/vec4: Use reads_accumulator_implicitly(), not MACH checks.Kenneth Graunke2017-04-241-4/+4
* nir/i965: add before ffma algebraic optsTimothy Arceri2017-04-241-0/+6
* i965/vec4: Avoid reswizzling MACH instructions in opt_register_coalesce().Kenneth Graunke2017-04-221-0/+7
* anv/query: Use genxml for MI_MATHJason Ekstrand2017-04-201-43/+28
* genxml: Add better support for MI_MATHJason Ekstrand2017-04-203-12/+195
* genxml/pack: Allow hex values in the XMLJason Ekstrand2017-04-201-1/+2
* anv/cmd_buffer: Disable CCS on BDW input attachmentsNanley Chery2017-04-172-30/+13
* anv: blorp: flush memory after copyLionel Landwerlin2017-04-171-2/+2
* intel/decoder: Fix is_header_field starting condition.Kenneth Graunke2017-04-161-1/+1
* anv: Add the pci_id into the shader cache UUIDJason Ekstrand2017-04-141-5/+15
* i965: Use correct VertStride on align16 instructions.Matt Turner2017-04-141-10/+34
* i965/vec4/dce: improve track of partial flag register writesSamuel Iglesias Gonsálvez2017-04-141-1/+1
* i965/vec4: don't do horizontal stride on some register file typesSamuel Iglesias Gonsálvez2017-04-141-2/+5
* i965/vec4: Fix exec size for MOVs {SET,PICK}_{HIGH,LOW}_32BIT.Matt Turner2017-04-141-4/+12
* i965/vec4: use vec4_builder to emit instructions in setup_imm_df()Samuel Iglesias Gonsálvez2017-04-142-50/+50
* i965/vec4: consider subregister offset in live variablesJuan A. Suarez Romero2017-04-141-2/+2
* i965/vec4: fix assert to detect SIMD lowered DF instructions in IVBFrancisco Jerez2017-04-141-5/+1
* i965/vec4: split VEC4_OPCODE_FROM_DOUBLE into one opcode per destination's typeSamuel Iglesias Gonsálvez2017-04-147-27/+60
* i965/vec4: split d2x conversion and data gathering from one opcode to two exp...Samuel Iglesias Gonsálvez2017-04-142-8/+1
* i965/vec4: fix VEC4_OPCODE_FROM_DOUBLE for IVB/BYTJuan A. Suarez Romero2017-04-141-7/+19
* i965/vec4: keep original type when dealing with null registersJuan A. Suarez Romero2017-04-141-0/+2
* i965/vec4: split DF instructions and later double its execsize in IVB/BYTSamuel Iglesias Gonsálvez2017-04-143-1/+53
* i965/fs: lower all non-force_writemask_all DF instructions to SIMD4 on IVB/BYTSamuel Iglesias Gonsálvez2017-04-141-0/+9
* i965/fs: Get 64-bit indirect moves working on IVB.Francisco Jerez2017-04-141-2/+25
* i965: Use source region <1,2,0> when converting to DF.Matt Turner2017-04-142-13/+28
* i965/fs: fix lower SIMD width for IVB/BYT's MOV_INDIRECTJuan A. Suarez Romero2017-04-141-3/+14
* i965/fs: fix dst stride in IVB/BYT type conversionsJuan A. Suarez Romero2017-04-141-27/+41
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