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* intel/compiler: Allocate pull_param in assign_constant_locationsJason Ekstrand2017-10-122-6/+14
| | | | | | | | | | | Now that everything is nicely ralloc'd, we can allocate the pull_param array in assign_constant_locations instead of higher up. We can also re-allocate the param array so that it's exactly the needed size. This should save us some memory because we're not allocating the total needed param space for both push and pull. Reviewed-by: Jordan Justen <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* intel: Allocate prog_data::[pull_]param deeper inside the compilerJason Ekstrand2017-10-122-4/+4
| | | | | | | | | | | | | Now that we're always growing the param array as-needed, we can allocate the param array in common code and stop repeating the allocation everywere. In order to keep things sane, we ralloc the [pull_]param array off of the compile context and then steal it back to a NULL context later. This doesn't get us all the way to where prog_data::[pull_]param is purely an out parameter of the back-end compiler but it gets us a lot closer. Reviewed-by: Jordan Justen <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* anv/pipeline: Refactor setup of the prog_data::param arrayJason Ekstrand2017-10-121-14/+9
| | | | | | | | Now that the only thing we put in the array up-front are client push constants, we can simplify anv_pipeline_compile a bit. Reviewed-by: Jordan Justen <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* anv/pipeline: Grow the param array for imagesJason Ekstrand2017-10-122-7/+5
| | | | | | | | Before, we were calculating up-front and then filling in later. Now we just grow as needed in anv_nir_apply_pipeline_layout. Reviewed-by: Jordan Justen <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* anv/pipeline: Whack nir->num_uniforms to MAX_PUSH_CONSTANT_SIZEJason Ekstrand2017-10-121-4/+2
| | | | | | | | | | | | This way any image uniforms end up having locations higher than MAX_PUSH_CONSTANT_SIZE. There's no bug here at the moment, but this consistency will make the next commit easier. Also, because nir_apply_pipeline_layout properly increments nir->num_uniforms when it expands the param array, we no longer need to stomp it to match prog_data::nr_params because it already does. Reviewed-by: Jordan Justen <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* intel/vs: Grow the param array for clip planesJason Ekstrand2017-10-122-0/+14
| | | | | | | | Instead of requiring the caller of brw_compile_vs to figure it out, just grow the param array on-demand. Reviewed-by: Jordan Justen <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* intel/cs: Grow prog_data::param on-demand for thread_local_id_indexJason Ekstrand2017-10-123-19/+9
| | | | | | | | | | Instead of making the caller of brw_compile_cs add something to the param array for thread_local_id_index, just add it on-demand in brw_nir_intrinsics and grow the array. This is now safe to do because everyone is now using ralloc for prog_data::param. Reviewed-by: Jordan Justen <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* intel/compiler: Make brw_nir_lower_intrinsics compute-specificJason Ekstrand2017-10-125-19/+13
| | | | | | | | | It's already only ever called from brw_compile_cs and only handles compute intrinsics. Let's just make it CS-specific. We can always make it handle other stages again later if we want. Reviewed-by: Jordan Justen <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* intel/compiler: Add a helper for growing the prog_data::param arrayJason Ekstrand2017-10-121-0/+13
| | | | | Reviewed-by: Jordan Justen <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* intel/compiler: Add a flag for pull constant supportJason Ekstrand2017-10-124-2/+12
| | | | | | | | | | | The Vulkan driver does not support pull constants. It simply limits things such that we can always push everything. Previously, we were determining whether or not to push things based on whether or not the prog_data::pull_param array is non-null. This is rather hackish and about to stop working. Reviewed-by: Jordan Justen <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* anv/pipeline: Ralloc prog_data::param of the compile mem_ctxJason Ekstrand2017-10-121-2/+1
| | | | | | | | | This way we stop leaking it. This is completely safe because, when we hand it off to anv_shader_bin_create or anv_pipeline_cache_upload_kernel, they make a copy of the entire param array. Reviewed-by: Jordan Justen <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* anv/pipeline: Add a mem_ctx parameter to anv_pipeline_compileJason Ekstrand2017-10-121-33/+39
| | | | | | | | This lets us avoid some of the manual ralloc stealing and prepares for future commits in which we will want to ralloc prog_data::param. Reviewed-by: Jordan Justen <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Store image_param in brw_context instead of prog_dataJason Ekstrand2017-10-122-8/+2
| | | | | | | | | | This burns an extra 10k of memory or so in the case where you don't have any images. However, if you have several shaders which use images, this should be much less memory. It also gets rid of a part of prog_data that really has nothing to do with the compiler. Reviewed-by: Jordan Justen <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* intel: Rewrite the world of push/pull paramsJason Ekstrand2017-10-1213-69/+133
| | | | | | | | | | | | | | | | | This moves us away to the array of pointers model and onto a model where each param is represented by a generic uint32_t handle. We reserve 2^16 of these handles for builtins that get generated by somewhere inside the compiler and have well-defined meanings. Generic params have handles whose meanings are defined by the driver. The primary downside to this new approach is that it moves a little bit of the work that we would normally do at compile time to draw time. On my laptop this hurts OglBatch6 by no more than 1% and doesn't seem to have any measurable affect on OglBatch7. So, while this may come back to bite us, it doesn't look too bad. Reviewed-by: Jordan Justen <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* anv/pipeline_cache: Rework to use multialloc and blobJason Ekstrand2017-10-122-159/+141
| | | | | | | | | This gets rid of all of our hand-rolled size calculation and serialization code and replaces it with safe "standards" that are used elsewhere in anv and mesa. This should be significantly safer than rolling our own. Reviewed-by: Jordan Justen <[email protected]>
* anv/pipeline: Declare bind maps closer to their useJason Ekstrand2017-10-121-12/+6
| | | | | | This is just a trivial cleanup. Reviewed-by: Jordan Justen <[email protected]>
* anv/multialloc: Add new add_size helperJason Ekstrand2017-10-121-2/+4
| | | | Reviewed-by: Jordan Justen <[email protected]>
* meson: fix typo in isltournier.elie2017-10-121-1/+1
| | | | | | Signed-off-by: Elie Tournier <[email protected]> Reviewed-by: Antia Puentes <[email protected]> Reviewed-by: Dylan Baker <[email protected]>
* anv: intel: use anv_image's computed size for importing a BOLionel Landwerlin2017-10-111-11/+15
| | | | | | | | Rather than relying on size = stride * height, we can rely on anv_image's total size. Signed-off-by: Lionel Landwerlin <[email protected]> Acked-by: Daniel Stone <[email protected]>
* anv: bo_cache: allow importing a BO larger than neededLionel Landwerlin2017-10-111-1/+1
| | | | | | | | | | | It's not a problem if a BO has been allocated larger than we need it to be. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=102940 Fixes: 818b857914 ("anv: Use the BO cache for DeviceMemory allocations") Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Daniel Stone <[email protected]> Cc: [email protected]
* i965: Fix output register sizes when multiple variables share a slot.Kenneth Graunke2017-10-101-5/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | ARB_enhanced_layouts allows multiple output variables to share the same location - and these variables may not have the same sizes. For example, consider these output variables: // consume X/Y/Z components of 6 vectors layout(location = 0) out vec3 a[6]; // consumes W component of the first vector layout(location = 0, component = 3) out float b; Looking at the first declaration, we see that VARYING_SLOT_VAR0 needs 24 components worth of space (vec3 padded out to a vec4, 4 * 6 = 24). But looking at the second declaration, we would think that VARYING_SLOT_VAR0 needs only 4 components of space (a single float padded out to a vec4). nir_setup_outputs() only considered the space requirements of the first declaration it happened to see, so if 'float b' came first, it would underallocate the output register space, causing brw_fs_validator.cpp to assert fail about inst->dst.offset exceeding the register size. Fixes Piglit's tests/spec/arb_enhanced_layouts/execution/component-layout/ vs-to-fs-array-interleave-single-location.shader_test. Thanks to Tim Arceri for finding this bug and writing a test! Reviewed-by: Timothy Arceri <[email protected]>
* anv: fix assert in wsi image code.Dave Airlie2017-10-111-1/+1
| | | | | | | | | | This assert was firing just running demos. Jason said it should be this. Fixes: 6c7720ed78 (anv/wsi: Allocate enough memory for the entire image) Reviewed-by: Jason Ekstrand <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* i965: Don't try to decode types for non-existent src1.Kenneth Graunke2017-10-101-1/+2
| | | | | | | | | | | | | | KHR-GL45.shader_ballot_tests.ShaderBallotBitmasks has a MOV that hits this validation path. MOVs don't have a src1 file, but calling brw_inst_src1_type() was tripping on src1.file being BRW_IMMEDIATE_VALUE and the hw_type being something invalid for immediates. To work around this, just pretend src1 is src0 if there isn't a src1. Fixes: 2572c2771d0cab0b9bc489d354ede44dfc88547b (i965: Validate "Special Requirements for Handling Double Precision Data Types") Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=102680 Reviewed-by: Alejandro Piñeiro <[email protected]>
* i965/tes: account for the fact that dvec3/4 inputs take two slotsIago Toral Quiroga2017-10-101-2/+7
| | | | | | | | | | | | | | | | | | | When computing the total size of the URB for tessellation evaluation inputs we were not accounting for this, and instead we were always assuming that each input would take a single vec4 slot, which could lead to computing a smaller read size than required. Specifically, this is a problem when the last input is a dvec3/4 such that its XY components are stored in the the second half of a payload register (which can happen if the offset for the input in the URB is not 64-bit aligned because there are 32-bit inputs mixed in) and the ZW components in the first half of the next, as in this case we would fail to account for the extra slot required for the ZW components. Fixes (requires another fix in CTS currently in review): KHR-GL45.enhanced_layouts.varying_locations KHR-GL45.enhanced_layouts.varying_array_locations Reviewed-by: Kenneth Graunke <[email protected]>
* anv: fix null pointer dereferenceTapani Pälli2017-10-101-0/+1
| | | | | | | | CID: 1419033 Signed-off-by: Tapani Pälli <[email protected]> Reviewed-by: Lionel Landwerlin <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* anv: Do not assert() on VK_ATTACHMENT_UNUSEDJózef Kucia2017-10-091-1/+2
| | | | | | Reviewed-by: Jason Ekstrand <[email protected]> Reviewed-by: Nanley Chery <[email protected]> Cc: [email protected]
* anv/wsi: Allocate enough memory for the entire imageJason Ekstrand2017-10-071-3/+4
| | | | | | | | | | | | | | | | Previously, we allocated memory for image->plane[0].surface.isl.size which is great if there is no compression. However, on BDW, we can do CCS_D on X-tiled images so we also have to allocate space for the auxiliary buffer. This fixes hangs in some of the WSI CTS tests and should also reduce hangs in real applications. In particular, it fixes the dEQP-VK.wsi.*.incremental_present.* test group. When we hand the image off to X11 or Wayland, it will ignore the CCS entirely which is ok because we do a resolve when it's transitioned to VK_IMAGE_LAYOUT_PRESENT_SRC_KHR. Reviewed-by: Lionel Landwerlin <[email protected]> Cc: [email protected]
* anv: fix nir.h includeLionel Landwerlin2017-10-071-1/+1
| | | | | | | | | | | | All over mesa we include "nir/nir.h", we should probably do the same here. This fixes the meson build that was broken by the ycbcr series. Thanks to Dylan for finding the issue. Signed-off-by: Lionel Landwerlin <[email protected]> Fixes: f3e91e78a337 ("anv: add nir lowering pass for ycbcr textures") Reviewed-by: Dylan Baker <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* anv/cmd_buffer: Reset state in cmd_buffer_destroyLionel Landwerlin2017-10-061-9/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This ensures that everything gets cleaned up properly. In particular, it fixes a memory leak where we were leaking the push constants structs. Valgrind stats on dEQP-VK.pipeline.push_constant.graphics_pipeline.range_size_128 : Before: HEAP SUMMARY: in use at exit: 2,467,513 bytes in 1,305 blocks total heap usage: 697,853 allocs, 696,530 frees, 138,466,600 bytes allocated LEAK SUMMARY: definitely lost: 1,068 bytes in 11 blocks indirectly lost: 24,669 bytes in 412 blocks possibly lost: 0 bytes in 0 blocks still reachable: 2,441,776 bytes in 882 blocks suppressed: 0 bytes in 0 blocks After: HEAP SUMMARY: in use at exit: 2,467,381 bytes in 1,304 blocks total heap usage: 697,853 allocs, 696,531 frees, 138,466,600 bytes allocated LEAK SUMMARY: definitely lost: 936 bytes in 10 blocks indirectly lost: 24,669 bytes in 412 blocks possibly lost: 0 bytes in 0 blocks still reachable: 2,441,776 bytes in 882 blocks suppressed: 0 bytes in 0 blocks Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]> Cc: "17.2 17.1" <[email protected]>
* anv/cmd_buffer: fix push descriptors with set > 0Lionel Landwerlin2017-10-062-13/+49
| | | | | | | | | | | | | | | | | When writing to set > 0, we were just wrongly writing to set 0. This commit fixes this by lazily allocating each set as we write to them. We didn't go for having them directly into the command buffer as this would require an additional ~45Kb per command buffer. v2: Allocate push descriptors from system memory rather than in BO streams. (Lionel) Cc: "17.2 17.1" <[email protected]> Fixes: 9f60ed98e501 ("anv: add VK_KHR_push_descriptor support") Reported-by: Daniel Ribeiro Maciel <[email protected]> Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* anv: enable VK_KHR_sampler_ycbcr_conversionLionel Landwerlin2017-10-066-18/+186
| | | | | | | | | | | | v2: Make GetImageMemoryRequirements2KHR() iterate over all pInfo structs (Lionel) Handle VkSamplerYcbcrConversionImageFormatPropertiesKHR (Andrew/Jason) Iterator over BindImageMemory2KHR's pNext structs correctly (Jason) v3: Revert GetImageMemoryRequirements2KHR() change from v2 (Jason) Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* anv: enable multiple planes per image/imageViewLionel Landwerlin2017-10-069-484/+915
| | | | | | | | | | | | | | | | | | | | | This change introduce the concept of planes for image & views. It matches the planes available in new formats. We also refactor depth & stencil support through the usage of planes for the sake of uniformity. In the backend (genX_cmd_buffer.c) we have to take some care though with regard to auxilliary surfaces. Multiplanar color buffers can have multiple auxilliary surfaces but depth & stencil share the same HiZ one (only store in the depth plane). v2: by Jason Remove unused aspect parameters from anv_blorp.c Assert when attempting to resolve YUV images Drop redundant logic for plane offset in make_surface() Rework anv_foreach_plane_aspect_bit() Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* anv: Take an image in can_sample_with_hizJason Ekstrand2017-10-063-9/+10
| | | | Reviewed-by: Lionel Landwerlin <[email protected]>
* anv: Take a single aspect in anv_layout_to_aux_usageJason Ekstrand2017-10-063-18/+15
| | | | Reviewed-by: Lionel Landwerlin <[email protected]>
* anv/cmd_buffer: Make get_fast_clear_state return an addressJason Ekstrand2017-10-061-22/+24
| | | | Reviewed-by: Lionel Landwerlin <[email protected]>
* anv/blorp: Add a concept of default aux usageJason Ekstrand2017-10-061-11/+16
| | | | | | | A good chunk of anv_blorp just wants the aux usage from the image. This magic aux_usage value means just that. Reviewed-by: Lionel Landwerlin <[email protected]>
* anv: add nir lowering pass for ycbcr texturesLionel Landwerlin2017-10-066-2/+496
| | | | | | | | | | | | | | | | | | This pass implements all the implicit conversions required by the VK_KHR_sampler_ycbcr_conversion specification. It also inserts plane sources onto sampling instructions that we then let the pipeline layout pass deal with, when mapping things correctly to descriptors. v2: Add new file to meson build (Lionel) Use nir_frcp() rather than (1.0f / x) (Jason) Reuse nir_tex_instr_dest_size() rather than handwritten one (Jason) Return progress (Jason) Account for array of samplers (Jason) Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* anv: prepare sampler emission code for multiplanar imagesLionel Landwerlin2017-10-063-41/+43
| | | | | | | | | | New settings from the KHR_sampler_ycbcr_conversion specifications might require different sampler settings for luma and chroma planes. This change makes the sampler table emission ready to handle multiple planes. Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* anv/apply_pipeline_layout: Prepare for multi-planar imagesLionel Landwerlin2017-10-064-22/+116
| | | | | Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* anv: add new formats KHR_sampler_ycbcr_conversionLionel Landwerlin2017-10-063-6/+189
| | | | | | | Adding new downsampling factors for each planes. Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* anv: modify the internal concept of format to express multiple planesLionel Landwerlin2017-10-064-256/+331
| | | | | | | | | | | | | | | A given Vulkan format can now be decomposed into a set of planes. We now use 'struct anv_format_plane' to represent the format of those planes. v2: by Jason Rename anv_get_plane_format() to anv_get_format_plane() Don't rename anv_get_isl_format() Replace ds_fmt() by fmt2() Introduce fmt_unsupported() Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* anv: prepare formats to handle disjoints setsLionel Landwerlin2017-10-061-10/+27
| | | | | | | | | | | Newer format enums start at offset 1000000000, making it impossible to have them all in one table. This change splits the formats into sets that we then access through indirection. v2: rename format_extract to vk_to_anv_format (Chad/Jason) Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* isl: fill out layout descriptions for yuv formatsLionel Landwerlin2017-10-061-4/+4
| | | | | | | Some description was missing. Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* isl: check whether a format is rgb if colorspace is yuvLionel Landwerlin2017-10-061-0/+2
| | | | | | | Suggested by Chad. Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* isl: make format layout channels accessible by indexLionel Landwerlin2017-10-061-9/+12
| | | | | | Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Chad Versace <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* intel/compiler: Don't propagate cmod into integer multipliesJason Ekstrand2017-10-052-0/+34
| | | | | | | No shader-db change on Sky Lake. Reviewed-by: Matt Turner <[email protected]> Cc: [email protected]
* intel/compiler: Don't cmod propagate into a saturated operationJason Ekstrand2017-10-052-0/+16
| | | | | | | | | | | | Shader-db results on Sky Lake: total instructions in shared programs: 12954445 -> 12955125 (0.01%) instructions in affected programs: 141862 -> 142542 (0.48%) helped: 0 HURT: 626 Reviewed-by: Matt Turner <[email protected]> Cc: [email protected]
* i965: Validate "Special Requirements for Handling Double Precision Data Types"Matt Turner2017-10-042-0/+792
| | | | | | | | | | | | | I did not implement: CNL's restriction on 64-bit int + align16, because I don't think we'll ever use this combination regardless of hardware generation. The restriction on immediate DF -> F conversions, because there's no reason to ever generate that, and I don't even know how DF -> F conversions are supposed to work in Align16 since (1) the dst stride must be 1, but (2) the dst stride would have to be 2 for src and dst strides to be aligned.
* i965: Fix and enable forgotten validation testMatt Turner2017-10-041-14/+17
| | | | I seem to have forgotten I still had work to do.
* i965: Only insert error message if not already presentMatt Turner2017-10-041-5/+13
| | | | | | | Some restrictions require something like strides to match between src and dest. For multi-source instructions, I'd rather encapsulate the logic for not inserting already present errors in ERROR_IF than open-coding it multiple places.
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