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* anv: Use GNU C empty brace initializerMatt Turner2017-08-292-11/+11
| | | | | | | | | Avoids Clang's warning about the current code: warning: suggest braces around initialization of subobject Reviewed-by: Emil Velikov <[email protected]> Reviewed-by: Eric Engestrom <[email protected]>
* i965: Drop unnecessary conditionalMatt Turner2017-08-291-4/+4
| | | | | | | | Clang doesn't realize that 0 and 1 are the only possibilities, a thinks lots of variables might be uninitialized. Reviewed-by: Emil Velikov <[email protected]> Reviewed-by: Eric Engestrom <[email protected]>
* configure: Test for -Wno-initializer-overridesMatt Turner2017-08-291-1/+1
| | | | | | | | Clang has "-Wno-initializer-overrides", while gcc has "-Wno-override-init". Quiets a lot of warnings with clang. Reviewed-by: Emil Velikov <[email protected]> Reviewed-by: Eric Engestrom <[email protected]>
* anv: Add support for the SYNC_FD handle type for fencesJason Ekstrand2017-08-284-11/+87
| | | | Reviewed-by: Lionel Landwerlin <[email protected]>
* anv: Implement VK_KHR_external_fenceJason Ekstrand2017-08-283-5/+161
| | | | Reviewed-by: Lionel Landwerlin <[email protected]>
* anv: Use DRM sync objects to back fences whenever possibleJason Ekstrand2017-08-284-9/+139
| | | | | | | | | In order to implement VK_KHR_external_fence, we need to back our fences with something that's shareable. Since the kernel wait interface for sync objects already supports waiting for multiple fences in one go, it makes anv_WaitForFences much simpler if we only have one type of fence. Reviewed-by: Lionel Landwerlin <[email protected]>
* anv/gem: Add support for syncobj wait and resetJason Ekstrand2017-08-283-0/+87
| | | | Reviewed-by: Lionel Landwerlin <[email protected]>
* anv/gem: Add a flags parameter to syncobj_createJason Ekstrand2017-08-284-5/+5
| | | | Reviewed-by: Lionel Landwerlin <[email protected]>
* anv: Rename anv_fence_state to anv_bo_fence_stateJason Ekstrand2017-08-283-18/+18
| | | | | | It only applies to legacy BO fences. Reviewed-by: Lionel Landwerlin <[email protected]>
* anv: Pull the guts of anv_fence into anv_fence_implJason Ekstrand2017-08-283-49/+159
| | | | | | | This is just a refactor, similar to what we did for semaphores, in preparation for handling VK_KHR_external_fence. Reviewed-by: Lionel Landwerlin <[email protected]>
* anv/wsi: Use QueueSubmit to trigger the fence in AcquireNextImageJason Ekstrand2017-08-281-3/+6
| | | | Reviewed-by: Lionel Landwerlin <[email protected]>
* anv: Rework fences to work more like BO semaphoresJason Ekstrand2017-08-283-68/+51
| | | | | | | | | | This commit changes fences to work a bit more like BO semaphores. Instead of the fence being a batch, it's simply a BO that gets added to the validation list for the last execbuf call in the QueueSubmit operation. It's a bit annoying finding the last submit in the execbuf but this allows us to avoid the dummy execbuf. Reviewed-by: Lionel Landwerlin <[email protected]>
* anv/queue: Allow temporary import of SYNC_FD semaphoresJason Ekstrand2017-08-281-3/+0
| | | | | | | | | | | | | | | | | | | | We didn't allow them before because it didn't look like the spec allowed it. It certainly doesn't make much sense. However, there are CTS tests that apparently hit this. What the spec actually says is: "Importing a payload using handle types with copy transference creates a duplicate copy of the payload at the time of import, but makes no further reference to it. Fence signaling, waiting, and resetting operations performed on the target of copy imports must not affect any other fence or payload." A SYNC_FD has copy transference but the import may be temporary or permanent. If you do a permanent import of something with copy transference, I guess it's supposed to work and end up resetting the permanent state. In any case, there seems to be no real harm in allowing it, so why not. Reviewed-by: Lionel Landwerlin <[email protected]>
* intel/compiler: Cast reg types explicitlyTopi Pohjolainen2017-08-281-2/+2
| | | | | | | | | | Makes coverity happier. CID: 1416799 Fixes: c1ac1a3d25 (i965: Add a brw_hw_type_to_reg_type() function) Reviewed-by: Matt Turner <[email protected]> Signed-off-by: Topi Pohjolainen <[email protected]>
* i965: Do not store SRC after 0 on component control.Rafael Antognolli2017-08-251-2/+2
| | | | | | | | | | | | | | | | | | The PRM SKL-Vol 2b-05.16 says: "Within a VERTEX_ELEMENT_STATE structure, if a Component Control field is set to something other than VFCOMP_STORE_SRC, no higher-numbered Component Control fields may be set to VFCOMP_STORE_SRC. In other words, only trailing components can be set to something other than VFCOMP_STORE_SRC." Since we set the component 1 to VFCOMP_STORE_0 on gen8+, and VFCOMP_STORE_IID on gen5+, and we are not using components 2 and 3, let's also set them to VFCOMP_STORE_0. Signed-off-by: Rafael Antognolli <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]> Reviewed-by: Anuj Phogat <[email protected]>
* anv,i965: Move CS shared lowering into anvJason Ekstrand2017-08-242-2/+5
| | | | | | | | | | | Right now, OpenGL uses the GLSL lowering for shared variables and anv uses NIR to lower them. For a long time, we've done this weird thing where we do the NIR lowering unconditionally and then add the SLM sizes from the two together. This works because one of them will always be 0 but it's a bit sketchy. Let's just move the NIR-based lowering into anv_pipeline and get rid of the sketch. Reviewed-by: Jordan Justen <[email protected]>
* i965: Stop using wm_prog_data->binding_table.render_target_start.Kenneth Graunke2017-08-231-2/+7
| | | | | | | | | | | | | Render target surfaces always start at binding table index 0. This is required for us to use headerless FB writes, which we really want to do. So, we'll never change that. Given that, it's not necessary to look up a wm_prog_data field which we already know contains 0. We can drop the dependency in brw_renderbuffer_surfaces (Gen4-5)...which was already confusingly missing from gen6_renderbuffer_surfaces. Reviewed-by: Topi Pohjolainen <[email protected]>
* i965: Add a brw_wm_prog_data::has_render_target_reads field.Kenneth Graunke2017-08-232-0/+3
| | | | | | | State upload code should use prog_data rather than poking at shader_info directly. Reviewed-by: Topi Pohjolainen <[email protected]>
* anv: Check that in_fence fd is valid before closing it.Francisco Jerez2017-08-221-1/+2
| | | | | | | | | Probably harmless, but will overwrite errno with a failure status code. Reported by coverity. CID 1416600: Argument cannot be negative (NEGATIVE_RETURNS) Fixes: 5c4e4932e02 (anv: Implement support for exporting semaphores as FENCE_FD) Reviewed-by: Lionel Landwerlin <[email protected]>
* anv: Add error handling to setup_empty_execbuf().Francisco Jerez2017-08-221-9/+13
| | | | | | | | | The anv_execbuf_add_bo() call can actually fail in practice, which should cause the QueueSubmit operation to fail. Reported by Coverity. CID: 1416606: Unchecked return value (CHECKED_RETURN) Fixes: 017cdb10cf (anv: Submit a dummy batch when only semaphores are provided.) Reviewed-by: Lionel Landwerlin <[email protected]>
* i965: Mark functions staticMatt Turner2017-08-213-20/+21
| | | | | | Cuts 300 bytes of .text Reviewed-by: Jordan Justen <[email protected]>
* i965/vec4: Use 'class' src_reg, rather than 'struct' src_regMatt Turner2017-08-211-1/+1
| | | | Reviewed-by: Jordan Justen <[email protected]>
* i965/vec4: Return float from spill_cost_for_type()Matt Turner2017-08-211-1/+1
| | | | | Reviewed-by: Jordan Justen <[email protected]> Reviewed-by: Iago Toral Quiroga <[email protected]>
* anv: Move clamp_int64() inside the IVB checkMatt Turner2017-08-211-1/+1
| | | | | | It's only used in the gen7_cmd_buffer_emit_scissor() function. Reviewed-by: Jordan Justen <[email protected]>
* i965: Optimize reading the destination typeMatt Turner2017-08-211-1/+3
| | | | | | | | | | | | | brw_hw_type_to_reg_type() needs to know only whether the file is BRW_IMMEDIATE_VALUE or not, which is not a valid file for the destination. gcc and clang will evaluate __builtin_strcmp() at compile time, so we can use it to pass a constant file for the destination. text data bss dec hex filename 7816214 346248 420496 8582958 82f72e i965_dri.so before 7816070 346248 420496 8582814 82f69e i965_dri.so after Reviewed-by: Scott D Phillips <[email protected]>
* i965: Mark brw_hw_type_to_reg_type() as a pure functionMatt Turner2017-08-211-1/+7
| | | | | | | | text data bss dec hex filename 7816886 346248 420496 8583630 82f9ce i965_dri.so before 7816214 346248 420496 8582958 82f72e i965_dri.so after Reviewed-by: Scott D Phillips <[email protected]>
* i965: Hide the register type hardware encodingsMatt Turner2017-08-212-31/+31
| | | | | | So we stop mixing them with the logical enum. Reviewed-by: Scott D Phillips <[email protected]>
* i965: Stop using hardware register types directlyMatt Turner2017-08-214-158/+113
| | | | Reviewed-by: Scott D Phillips <[email protected]>
* i965: Add brw_hw_reg_type_to_letters() and use it in brw_disasm.cMatt Turner2017-08-213-39/+45
| | | | Reviewed-by: Scott D Phillips <[email protected]>
* i965: Move brw_reg_type_letters() as wellMatt Turner2017-08-216-33/+37
| | | | | | | And add "to_" to the name for consistency with the other functions in this file. Reviewed-by: Scott D Phillips <[email protected]>
* i965: Switch to using the logical register typesMatt Turner2017-08-212-21/+19
| | | | Reviewed-by: Scott D Phillips <[email protected]>
* i965: Add functions to abstract access to register typesMatt Turner2017-08-212-51/+79
| | | | | | | | | | | | | | | | | | Previously the brw_inst{,_set}_{dst,src0,src1}_reg_type() functions provided access to the hardware encodings for the register types. We often mixed these with the logical BRW_REGISTER_TYPE_* enums (which themselves used to be the hardware format!) with bad results. With that functionality now available with the hw_ versions (see previous commit), we now add functions that take the logical BRW_REGISTER_TYPE_* enums and convert into the hardware format and vice versa. To do the conversion we also have to provide the file. Note the asymmetry between the two functions: the new getter reads the file from the instruction word, and to ensure that is always set the setter writes both the file and the type. Reviewed-by: Scott D Phillips <[email protected]>
* i965: Rename brw_inst's functions that access the register typeMatt Turner2017-08-217-99/+99
| | | | | | Put hw_ in the name so that it's clear these are the hardware encodings. Reviewed-by: Scott D Phillips <[email protected]>
* i965: Index brw_hw_reg_type_to_size()'s table by logical typeMatt Turner2017-08-211-39/+19
| | | | | | I'll be transitioning everything to use the logical types. Reviewed-by: Scott D Phillips <[email protected]>
* i965: Add a brw_hw_type_to_reg_type() functionMatt Turner2017-08-212-0/+29
| | | | | | Will be used in later commits. Reviewed-by: Scott D Phillips <[email protected]>
* i965: Use a common table to translate logical to hardware typesMatt Turner2017-08-211-36/+29
| | | | Reviewed-by: Scott D Phillips <[email protected]>
* i965: Extract functions dealing with register types to separate fileMatt Turner2017-08-215-140/+209
| | | | | | | | | | I'm going to encapsulate all of the logic dealing with register types in this file. Rename the parameters for the hardware encodings from type -> hw_type at the same time. Reviewed-by: Scott D Phillips <[email protected]>
* i965: Reverse file/type arguments to register type functionsMatt Turner2017-08-214-13/+15
| | | | | | | I think of the initial arguments as "state" and the last as the actual subject. Reviewed-by: Scott D Phillips <[email protected]>
* i965: Add support for disassembling 64-bit integer immediatesMatt Turner2017-08-212-0/+13
| | | | | | | After the last patch converted things into enums, I helpfully got a compiler warning about these missing from the switch statement. Reviewed-by: Scott D Phillips <[email protected]>
* i965: Use separate enums for register vs immediate typesMatt Turner2017-08-216-129/+144
| | | | | | | The hardware encodings often mean different things depending on whether the source is an immediate. Reviewed-by: Scott D Phillips <[email protected]>
* i965: Reorder brw_reg_type enum valuesMatt Turner2017-08-215-26/+21
| | | | | | | | | | | These vaguely corresponded to the hardware encodings, but that is purely historical at this point. Reorder them so we stop making things "almost work" when mixing enums. The ordering has been closen so that no enum value is the same as a compatible hardware encoding. Reviewed-by: Scott D Phillips <[email protected]>
* i965: Validate destination restrictions with vector immediatesMatt Turner2017-08-213-12/+141
| | | | Reviewed-by: Scott D Phillips <[email protected]>
* i965: Don't let raw-move check be tricked by immediate vector typesMatt Turner2017-08-211-3/+10
| | | | | | | UB and B type encodings are the same as UV and VF. Noticed when writing the following patch. Reviewed-by: Scott D Phillips <[email protected]>
* i965: Only change type of 0.0f to VF if destination stride == 1Matt Turner2017-08-211-1/+2
| | | | | | | | | | The destination stride must be equivalent to a dword if VF is used. Also, since the only compaction table entires with "i:vf" have the destination as "r:f" specifically check that the destination is of type float. Reviewed-by: Scott D Phillips <[email protected]>
* i965: Remove CONT/BREAK from instruction compaction testMatt Turner2017-08-211-4/+0
| | | | | | | These cannot be compacted. A similar mistake was fixed in commit 90eaf01616a8 Reviewed-by: Scott D Phillips <[email protected]>
* i965: Test instruction compaction on all supported GensMatt Turner2017-08-211-8/+42
| | | | | | | | Note that there's no point in testing on G45, since its compaction is the same as Gen5. Same logic applies to Gen7 variants and low-power parts. Reviewed-by: Scott D Phillips <[email protected]>
* i965: Silence signed/unsigned comparison warningMatt Turner2017-08-211-1/+1
| | | | Reviewed-by: Scott D Phillips <[email protected]>
* i965: Move compaction "prepass" into brw_eu_compact.cMatt Turner2017-08-212-72/+82
| | | | Reviewed-by: Scott D Phillips <[email protected]>
* i965: Mark src inst pointer const in compaction codeMatt Turner2017-08-212-12/+13
| | | | Reviewed-by: Scott D Phillips <[email protected]>
* intel/blorp: Adjust intra-tile x when faking rgb with red-onlyTopi Pohjolainen2017-08-211-0/+1
| | | | | | | | | | v2 (Jason): Adjust directly in surf_fake_rgb_with_red() Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=101910 CC: [email protected] Reviewed-by: Jason Ekstrand <[email protected]> Signed-off-by: Topi Pohjolainen <[email protected]>
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