summaryrefslogtreecommitdiffstats
path: root/src/intel
Commit message (Collapse)AuthorAgeFilesLines
* i965: fix blorp stage_prog_data->param leakTapani Pälli2017-10-301-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | Patch uses mem_ctx for allocation to ensure param array gets freed later. ==6164== 48 bytes in 1 blocks are definitely lost in loss record 61 of 193 ==6164== at 0x4C2EB6B: malloc (vg_replace_malloc.c:299) ==6164== by 0x12E31C6C: ralloc_size (ralloc.c:121) ==6164== by 0x130189F1: fs_visitor::assign_constant_locations() (brw_fs.cpp:2095) ==6164== by 0x13022D32: fs_visitor::optimize() (brw_fs.cpp:5715) ==6164== by 0x13024D5A: fs_visitor::run_fs(bool, bool) (brw_fs.cpp:6229) ==6164== by 0x1302549A: brw_compile_fs (brw_fs.cpp:6570) ==6164== by 0x130C4B07: blorp_compile_fs (blorp.c:194) ==6164== by 0x130D384B: blorp_params_get_clear_kernel (blorp_clear.c:79) ==6164== by 0x130D3C56: blorp_fast_clear (blorp_clear.c:332) ==6164== by 0x12EFA439: do_single_blorp_clear (brw_blorp.c:1261) ==6164== by 0x12EFC4AF: brw_blorp_clear_color (brw_blorp.c:1326) ==6164== by 0x12EFF72B: brw_clear (brw_clear.c:297) Fixes: 8d90e28839 ("intel/compiler: Allocate pull_param in assign_constant_locations") Signed-off-by: Tapani Pälli <[email protected]> Reviewed-by: Lionel Landwerlin <[email protected]> Cc: [email protected]
* i965: Delete brw_wm_prog_key::drawable_height.Kenneth Graunke2017-10-291-1/+0
| | | | | | This has been unused since we switched to nir_lower_wpos_ytransform. Reviewed-by: Jason Ekstrand <[email protected]>
* intel/compiler/gen9: Pixel shader header only workaroundTopi Pohjolainen2017-10-281-0/+29
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fixes intermittent GPU hangs on Broxton with an Intel internal test case. There are plenty of similar fragment shaders in piglit that do not use any varyings and any uniforms. According to the documentation special timing is needed between pipeline stages. Apparently we just don't hit that with piglit. Even with the failing test case one doesn't always get the hang. Moreover, according to the error states the hang happens significantly later than the execution of the problematic shader. There are multiple render cycles (primitive submissions) in between. I've also seen error states where the ACTHD points outside the batch. Almost as if the hardware writes somewhere that gets used later on. That would also explain why piglit doesn't suffer from this - most tests kick off one render cycle and any corruption is left unseen. v2 (Ken): Instead of enabling push constants, enable one of the inputs (PSIZ). v3 (Ken, Jason): Use LAYER instead making vulkan emit_3dstate_sbe() happy. Cc: "17.3 17.2" <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Signed-off-by: Topi Pohjolainen <[email protected]>
* anv: Fix assert about source attrs.Kenneth Graunke2017-10-271-1/+1
| | | | | | | | | Asserting slot >= 2 made sense when the URB read offset was always 1 (pair of slots). Commit 566a0c43f0b9fbf5106161471dd5061c7275f761 made it possible to read from the VUE header in slot 0, by adjusting the offset to be 0. So, this assert is now bogus. Use the one from GL. Reviewed-by: Jason Ekstrand <[email protected]>
* anv: Drop URB entry output read handling in 3DSTATE_XS.Kenneth Graunke2017-10-271-26/+0
| | | | | | | | | Commit 566a0c43f0b9fbf5106161471dd5061c7275f761 started setting the 3DSTATE_SBE bit to override these values with the one calculated there. So, they're dead. Stop setting them. Reviewed-by: Jason Ekstrand <[email protected]>
* i965: Delete unused brw_vs_prog_data::nr_attributes field.Kenneth Graunke2017-10-272-2/+0
| | | | Reviewed-by: Matt Turner <[email protected]>
* intel/tools/disasm: correctly observe FILE *out parameterKevin Rogovin2017-10-261-2/+2
| | | | | | Signed-off-by: Kevin Rogovin <[email protected]> Reviewed-by: Lionel Landwerlin <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* intel/compiler: brw_validate_instructions to take const void* instead of void*Kevin Rogovin2017-10-262-2/+2
| | | | | | | The disassembler does not (and should not) be modifying the data. Signed-off-by: Kevin Rogovin <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* anv/entrypoints: Dump useful data if mako throws an exceptionJason Ekstrand2017-10-251-5/+17
| | | | Reviewed-by: Lionel Landwerlin <[email protected]>
* intel/compiler: Call nir_lower_system_values in brw_preprocess_nirJason Ekstrand2017-10-252-2/+2
| | | | Reviewed-by: Lionel Landwerlin <[email protected]>
* anv/pipeline: Call nir_lower_system_valaues after brw_preprocess_nirJason Ekstrand2017-10-251-1/+2
| | | | | | | | | | We currently have a bug where nir_lower_system_values gets called before nir_lower_var_copies so it will miss any system value uses which come from a copy_var intrinsic. Moving it to after brw_preprocess_nir fixes this problem. Reviewed-by: Lionel Landwerlin <[email protected]> Cc: [email protected]
* anv/pipeline: Drop nir_lower_clip_cull_distance_arraysJason Ekstrand2017-10-251-2/+0
| | | | | | We already handle it in brw_preprocess_nir Reviewed-by: Lionel Landwerlin <[email protected]>
* anv/pipeline: Dump shader immedately after spirv_to_nirJason Ekstrand2017-10-251-0/+15
| | | | Reviewed-by: Lionel Landwerlin <[email protected]>
* intel/eu: Use EXECUTE_1 for JMPIJason Ekstrand2017-10-252-2/+1
| | | | | | | | | | | | The PRM says "The execution size must be 1." In 73137997e23ff6c11, the execution size was set to 1 when it should have been BRW_EXECUTE_1 (which maps to 0). Later, in dc2d3a7f5c217a7cee9, JMPI was used for line AA on gen6 and earlier and we started manually stomping the exeution size to BRW_EXECUTE_1 in the generator. This commit fixes the original bug and makes brw_JMPI just do the right thing. Reviewed-by: Matt Turner <[email protected]> Fixes: 73137997e23ff6c1145d036315d1a9ad96651281
* i965/fs: Add brw_reg_type_from_bit_size utility methodAlejandro Piñeiro2017-10-251-5/+64
| | | | | | | | | | | | | | | Returns the brw_type for a given ssa.bit_size, and a reference type. So if bit_size is 64, and the reference type is BRW_REGISTER_TYPE_F, it returns BRW_REGISTER_TYPE_DF. The same applies if bit_size is 32 and reference type is BRW_REGISTER_TYPE_HF it returns BRW_REGISTER_TYPE_F v2 (Jason Ekstrand): - Use better unreachable() messages - Add Q types Signed-off-by: Jose Maria Casanova Crespo <[email protected]> Signed-off-by: Alejandro Piñeiro <[email protected] Reviewed-by: Jason Ekstrand <[email protected]>
* i965/fs/nir: Use the nir_src_bit_size helperJason Ekstrand2017-10-251-9/+3
| | | | Reviewed-by: Lionel Landwerlin <[email protected]>
* intel/fs: Handle flag read/write aliasing in needs_src_copyJason Ekstrand2017-10-251-1/+3
| | | | | | | | | | | | | | | In order to implement the ballot intrinsic, we do a MOV from flag register to some GRF. If that GRF is used in a SEL, cmod propagation helpfully changes it into a MOV from the flag register with a cmod. This is perfectly valid but when lower_simd_width comes along, it simply splits into two instructions which both have conditional modifiers. This is a problem since we're reading the flag register. This commit makes us check whether or not flags_written() overlaps with the flag values that we are reading via the instruction source and, if we have any interference, will force us to emit a copy of the source. Reviewed-by: Matt Turner <[email protected]> Cc: [email protected]
* intel/nir: Zero local index const struct for valgrind & nir_serializeJordan Justen2017-10-251-0/+1
| | | | | | | Signed-off-by: Jordan Justen <[email protected]> Reviewed-by: Timothy Arceri <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* meson: extract out variable for nir_algebraic.pyRob Clark2017-10-241-1/+1
| | | | | | | | Also needed in freedreno/ir3. Signed-off-by: Rob Clark <[email protected]> Reviewed-by: Eric Engestrom <[email protected]> Reviewed-by: Dylan Baker <[email protected]>
* i965: Fix memmem compiler warnings.Eric Anholt2017-10-241-1/+2
| | | | | | | | | | | | | | | | | | | gcc is throwing this warning in my meson build: ../src/intel/compiler/brw_eu_validate.c:50:11: warning argument 1 null where non-null expected [-Wnonnull] return memmem(haystack.str, haystack.len, ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ needle.str, needle.len) != NULL; ~~~~~~~~~~~~~~~~~~~~~~~ The first check for CONTAINS has a NULL error_msg.str and 0 len. The glibc implementation will exit without looking at any haystack bytes if haystack.len < needle.len, so this was safe, but silence the warning anyway by guarding against implementation variablility. Fixes: 122ef3799d56 ("i965: Only insert error message if not already present") Reviewed-by: Matt Turner <[email protected]>
* anv: don't assert on device init on CannonlakeLionel Landwerlin2017-10-211-2/+4
| | | | | | | v2: Warn that support is still in alpha (Jason) Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* anv: disable stencil pma fix on Gen > 9Lionel Landwerlin2017-10-211-0/+2
| | | | | | | | This workaround isn't listed on Gen10. Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* blorp: enable R32G32B32X32 blorp ccs copiesLionel Landwerlin2017-10-211-0/+1
| | | | | Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* i965/fs: Use align1 mode on ternary instructions on Gen10+Matt Turner2017-10-201-4/+8
| | | | | | | | | Align1 mode offers some nice features over align16, like access to more data types and the ability to use a 16-bit immediate. This patch does not start using any new features. It just emits ternary instructions in align1 mode. Reviewed-by: Scott D Phillips <[email protected]>
* i965: Add align1 ternary instruction emission supportMatt Turner2017-10-201-55/+160
| | | | Reviewed-by: Scott D Phillips <[email protected]>
* i965: Add align1 ternary instruction disassembler supportMatt Turner2017-10-202-75/+288
| | | | Reviewed-by: Scott D Phillips <[email protected]>
* i965: Add align1 ternary instruction-word supportMatt Turner2017-10-201-0/+108
| | | | Reviewed-by: Scott D Phillips <[email protected]>
* i965: Add align1 ternary instruction support to conversion functionsMatt Turner2017-10-204-34/+101
| | | | Reviewed-by: Scott D Phillips <[email protected]>
* i965: Add align1 ternary instruction field encodingsMatt Turner2017-10-201-0/+35
| | | | Reviewed-by: Scott D Phillips <[email protected]>
* i965: Add functions to abstract access to 3src register typesMatt Turner2017-10-202-20/+23
| | | | Reviewed-by: Scott D Phillips <[email protected]>
* i965: Rename brw_inst's functions that access the 3src register typeMatt Turner2017-10-203-18/+18
| | | | | | | | | Put hw_ in the name so that it's clear these are the hardware encodings. Similar to commit 9fb832332868 ("i965: Rename brw_inst's functions that access the register type") Reviewed-by: Scott D Phillips <[email protected]>
* i965: Rename brw_inst 3src functions in preparation for align1Matt Turner2017-10-204-86/+92
| | | | Reviewed-by: Scott D Phillips <[email protected]>
* i965: Print subreg in units of type-size on ternary instructionsMatt Turner2017-10-201-5/+26
| | | | | | | | The instruction word contains SubRegNum[4:2] so it's in units of dwords (hence the * 4 to get it in terms of bytes). Before this patch, the subreg would have been wrong for DF arguments. Reviewed-by: Scott D Phillips <[email protected]>
* i965: Add functions for brw_reg_type <-> hw 3src typeMatt Turner2017-10-202-0/+58
| | | | Reviewed-by: Scott D Phillips <[email protected]>
* i965: Move brw_reg_type_is_floating_point to brw_reg_type.hMatt Turner2017-10-202-13/+15
| | | | | | | I'm going to call this from brw_inst.h, and I don't want to have to include all of brw_reg.h. Reviewed-by: Scott D Phillips <[email protected]>
* nir: Get rid of nir_shader::stageJason Ekstrand2017-10-2011-37/+38
| | | | | | | | It's redundant with nir_shader::info::stage. Acked-by: Timothy Arceri <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Jordan Justen <[email protected]>
* i965/vec4: remove setting default LOD in the backendSamuel Iglesias Gonsálvez2017-10-202-21/+0
| | | | | | | It is already done in NIR. Signed-off-by: Samuel Iglesias Gonsálvez <[email protected]> Reviewed-by: Lionel Landwerlin <[email protected]>
* i965/fs: remove setting default LOD in the backendSamuel Iglesias Gonsálvez2017-10-201-9/+0
| | | | | | | It is already done in NIR. Signed-off-by: Samuel Iglesias Gonsálvez <[email protected]> Reviewed-by: Lionel Landwerlin <[email protected]>
* isl: Fix width check in isl_gen7_choose_msaa_layout.Kenneth Graunke2017-10-191-1/+1
| | | | | | | | | | The restriction is supposed to apply if the width *field* is >= 8192, meaning the actual width *value* is >= 8193. The code also incorrectly used == for some reason. Reviewed-by: Juan A. Suarez Romero <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* i965: Use is_scheduling_barrier instead of schedule_node::is_barrier.Kenneth Graunke2017-10-191-22/+10
| | | | | | | | | | | | | | | | | | | Commit a73116ecc60414ade89802150b tried to make add_barrier_deps() walk to the next barrier, and stop. To accomplish that, it added an is_barrier flag. Unfortunately, this only works half of the time. The issue is that add_barrier_deps() walks both backward (to the previous barrier), and forward (to the next barrier). It also sets is_barrier. Assuming that we're processing instructions in forward order, this means that is_barrier will be set for previous instructions, but not future ones. So we'll never see it, and walk further than we need to. dEQP-GLES31.functional.ssbo.layout.random.all_shared_buffer.23 now compiles its shaders in 3.6 seconds instead of 3.3 minutes. Reviewed-by: Matt Turner <[email protected]> Tested-by: Pallavi G <[email protected]>
* i965: Move fs_inst::has_side_effects()'s eot check to the parent class.Kenneth Graunke2017-10-195-9/+3
| | | | | | | | | This eliminates a layer of wrapping, and makes a backend_instruction sufficient. The downside is that it exposes 'eot' to the vec4 backend, which it doesn't need, but can basically happily ignore. Reviewed-by: Matt Turner <[email protected]> Tested-by: Pallavi G <[email protected]>
* anv: Fix instance typos.Vinson Lee2017-10-182-2/+2
| | | | | | | | | | | | | | | | | | Fix build error. CC vulkan/vulkan_libvulkan_common_la-anv_device.lo In file included from vulkan/anv_device.c:33:0: vulkan/anv_device.c: In function ‘anv_AllocateMemory’: vulkan/anv_device.c:1562:37: error: ‘struct anv_device’ has no member named ‘instace’; did you mean ‘instance’? result = vk_errorf(device->instace, device, ^ vulkan/anv_private.h:317:17: note: in definition of macro ‘vk_errorf’ __vk_errorf(instance, obj, REPORT_OBJECT_TYPE(obj), error,\ ^~~~~~~~ Fixes: 9775894f1025 ("anv: Move size check from anv_bo_cache_import() to caller (v2)") Signed-off-by: Vinson Lee <[email protected]> Reviewed-by: Eric Engestrom <[email protected]>
* meson: move expat dependency where it's neededEric Engestrom2017-10-182-2/+2
| | | | | | Suggested-by: Lionel Landwerlin <[email protected]> Reviewed-by: Lionel Landwerlin <[email protected]> Signed-off-by: Eric Engestrom <[email protected]>
* automake: intel: move expat handling where it's usedHongxu Jia2017-10-182-5/+2
| | | | | | | | | | Linking libvulkan_intel.so can fail, due to unresolved references to libexpat.so. EXPAT_CFLAGS should be moved as well. Signed-off-by: Hongxu Jia <[email protected]> Reviewed-by: Lionel Landwerlin <[email protected]>
* anv: Install as Vulkan HAL module in Android.mk buildTapani Pälli2017-10-181-1/+3
| | | | | | | | | | | | | | | | | Now that anvil fully implements the Vulkan HAL interface, we can install it as the vendor HAL module at /vendor/lib/hw/vulkan.${board}.so. To do so: - Rename LOCAL_MODULE to vulkan.$(TARGET_BOARD_PLATFORM). - Use LOCAL_PROPRIETARY_MODULE to install under vendor path. Tested by running different Sascha Williams demos on Android-IA. Signed-off-by: Tapani Pälli <[email protected]> [chadv: Extract this hunk from Tapani's patch, and embed it as stand-alone patch in my arc-vulkan series]. Signed-off-by: Chad Versace <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* anv: Implement VK_ANDROID_native_buffer (v9)Chad Versace2017-10-188-6/+459
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This implementation is correct (afaict), but takes two shortcuts regarding the import/export of Android sync fds. Shortcut 1. When Android calls vkAcquireImageANDROID to import a sync fd into a VkSemaphore or VkFence, the driver instead simply blocks on the sync fd, then puts the VkSemaphore or VkFence into the signalled state. Thanks to implicit sync, this produces correct behavior (with extra latency overhead, perhaps) despite its ugliness. Shortcut 2. When Android calls vkQueueSignalReleaseImageANDROID to export a collection of wait semaphores as a sync fd, the driver instead submits the semaphores to the queue, then returns sync fd -1, which informs the caller that no additional synchronization is needed. Again, thanks to implicit sync, this produces correct behavior (with extra batch submission overhead) despite its ugliness. I chose to take the shortcuts instead of properly importing/exporting the sync fds for two reasons: Reason 1. I've already tested this patch with dEQP and with demos apps. It works. I wanted to get the tested patches into the tree now, and polish the implementation afterwards. Reason 2. I want to run this on a 3.18 kernel (gasp!). In 3.18, i915 supports neither Android's sync_fence, nor upstream's sync_file, nor drm_syncobj. Again, I tested these patches on Android with a 3.18 kernel and they work. I plan to quickly follow-up with patches that remove the shortcuts and properly import/export the sync fds. Non-Testing =========== I did not test at all using the Android.mk buildsystem. I may have broke it. Please test and review that. Testing ======= I tested with 64-bit ARC++ on a Skylake Chromebook and a 3.18 kernel. The following pass (as of patchset v9): - a little spinning cube demo APK - several Sascha demos - dEQP-VK.info.* - dEQP-VK.api.wsi.android.* (except dEQP-VK.api.wsi.android.swapchain.*.image_usage, because dEQP wants to create swapchains with VK_IMAGE_USAGE_STORAGE_BIT) - dEQP-VK.api.smoke.* - dEQP-VK.api.info.instance.* - dEQP-VK.api.info.device.* v2: - Reject VkNativeBufferANDROID if the dma-buf's size is too small for the VkImage. - Stop abusing VkNativeBufferANDROID by passing it to vkAllocateMemory during vkCreateImage. Instead, directly import its dma-buf during vkCreateImage with anv_bo_cache_import(). [for jekstrand] - Rebase onto Tapani's VK_EXT_debug_report changes. - Drop `CPPFLAGS += $(top_srcdir)/include/android`. The dir does not exist. v3: - Delete duplicate #include "anv_private.h". [per Tapani] - Try to fix the Android-IA build in Android.vulkan.mk by following Tapani's example. v4: - Unset EXEC_OBJECT_ASYNC and set EXEC_OBJECT_WRITE on the imported gralloc buffer, just as we do for all other winsys buffers in anv_wsi.c. [found by Tapani] v5: - Really fix the Android-IA build by ensuring that Android.vulkan.mk uses Mesa' vulkan.h and not Android's. Insert -I$(MESA_TOP)/include before -Iframeworks/native/vulkan/include. [for Tapani] - In vkAcquireImageANDROID, submit signal operations to the VkSemaphore and VkFence. [for zhou] v6: - Drop copy-paste duplication in vkGetSwapchainGrallocUsageANDROID(). [found by zhou] - Improve comments in vkGetSwapchainGrallocUsageANDROID(). v7: - Fix vkGetSwapchainGrallocUsageANDROID() to inspect its VkImageUsageFlags parameter. [for tfiga] - This fix regresses dEQP-VK.api.wsi.android.swapchain.*.image_usage because dEQP wants to create swapchains with VK_IMAGE_USAGE_STORAGE_BIT. v8: - Drop unneeded goto in vkAcquireImageANDROID. [for tfiga] v8.1: (minor changes) - Drop errant hunks added by rerere in anv_device.c. - Drop explicit mention of VK_ANDROID_native_buffer in anv_entrypoints_gen.py. [for jekstrand] v9: - Isolate as much Android code as possible, moving it from anv_image.c to anv_android.c. Connect the files with anv_image_from_gralloc(). Remove VkNativeBufferANDROID params from all anv_image.c funcs. [for krh] - Replace some intel_loge() with vk_errorf() in anv_android.c. - Use © in copyright line. [for krh] Reviewed-by: Tapani Pälli <[email protected]> (v5) Reviewed-by: Kristian H. Kristensen <[email protected]> (v9) Reviewed-by: Jason Ekstrand <[email protected]> (v9) Cc: zhoucm1 <[email protected]> Cc: Tomasz Figa <[email protected]>
* anv: Move size check from anv_bo_cache_import() to caller (v2)Chad Versace2017-10-175-23/+46
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This change prepares for VK_ANDROID_native_buffer. When the user imports a gralloc hande into a VkImage using VK_ANDROID_native_buffer, the user provides no size. The driver must infer the size from the internals of the gralloc buffer. The patch is essentially a refactor patch, but it does change behavior in some edge cases, described below. In what follows, the "nominal size" of the bo refers to anv_bo::size, which may not match the bo's "actual size" according to the kernel. Post-patch, the nominal size of the bo returned from anv_bo_cache_import() is always the size of imported dma-buf according to lseek(). Pre-patch, the bo's nominal size was difficult to predict. If the imported dma-buf's gem handle was not resident in the cache, then the bo's nominal size was align(VkMemoryAllocateInfo::allocationSize, 4096). If it *was* resident, then the bo's nominal size was whatever the cache returned. As a consequence, the first cache insert decided the bo's nominal size, which could be significantly smaller compared to the dma-buf's actual size, as the nominal size was determined by VkMemoryAllocationInfo::allocationSize and not lseek(). I believe this patch cleans up that messy behavior. For an imported or exported VkDeviceMemory, anv_bo::size should now be the true size of the bo, if I correctly understand the problem (which I possibly don't). v2: - Preserve behavior of aligning size to 4096 before checking. [for jekstrand] - Check size with < instead of <=, to match behavior of commit c0a4f56 "anv: bo_cache: allow importing a BO larger than needed". [for chadv]
* anv: Add func anv_gem_get_tiling()Chad Versace2017-10-172-0/+17
| | | | | | Will use in VK_ANDROID_native_buffer. Reviewed-by: Jason Ekstrand <[email protected]>
* anv: Move close(fd) from anv_bo_cache_import to its callers (v2)Chad Versace2017-10-174-23/+24
| | | | | | | | | | | | | This will allow us to implement VK_ANDROID_native_buffer without dup'ing the fd. We must close the fd in VK_KHR_external_memory_fd, but we should not in VK_ANDROID_native_buffer. v2: - Add missing close(fd) for case VK_EXTERNAL_SEMAPHORE_HANDLE_TYPE_OPAQUE_FD_BIT_KHR, subcase ANV_SEMAPHORE_TYPE_BO. Reviewed-by: Jason Ekstrand <[email protected]>
* anv: Add field anv_image::planes[]::bo_is_owned (v2)Chad Versace2017-10-172-0/+14
| | | | | | | | | | | | | If this flag is set, then the image and the bo have the same lifetime. vkDestroyImage will release the bo. We need this for VK_ANDROID_native_buffer, because that extension creates the VkImage *and* imports its memory during the same call, vkCreateImage. v2: Rebase onto VK_KHR_bind_memory2. Reviewed-by: Jason Ekstrand <[email protected]>
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-28 12:56:28 +0000