aboutsummaryrefslogtreecommitdiffstats
path: root/src/intel
Commit message (Collapse)AuthorAgeFilesLines
* intel/perf: Move perf query register programming to static tables.Eric Anholt2020-07-174-12/+21
| | | | | | | | | | | And now that they're static tables, we don't need to ralloc a copy in non-shared memory. Saves ~210k in the built intel drivers. Bug: https://bugs.chromium.org/p/chromium/issues/detail?id=1048434 Reviewed-by: Lionel Landwerlin <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5829>
* intel/perf: Fix unused var warning in release builds.Eric Anholt2020-07-171-1/+1
| | | | | Reviewed-by: Lionel Landwerlin <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5829>
* intel: Fix release-build warnings about sf_entry_size.Eric Anholt2020-07-171-1/+1
| | | | | | | In one side of the ifdef it's only used in an assert. Reviewed-by: Lionel Landwerlin <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5829>
* intel/ehl: Add new PCI-IDsAnuj Phogat2020-07-141-0/+11
| | | | | Signed-off-by: Anuj Phogat <[email protected]> Reviewed-by: Lionel Landwerlin <[email protected]>
* intel/ehl: Rename gen_device_info structAnuj Phogat2020-07-141-4/+4
| | | | | | | Renaming makes it easier to relate a pciid with device configuration. Signed-off-by: Anuj Phogat <[email protected]> Reviewed-by: Lionel Landwerlin <[email protected]>
* intel/ehl: Use macro GEN11_LP_FEATURES in device infoAnuj Phogat2020-07-141-24/+12
| | | | | Signed-off-by: Anuj Phogat <[email protected]> Reviewed-by: Lionel Landwerlin <[email protected]>
* intel/ehl: Use GEN11_URB_MIN_MAX_ENTRIES in device infoAnuj Phogat2020-07-141-40/+4
| | | | | Signed-off-by: Anuj Phogat <[email protected]> Reviewed-by: Lionel Landwerlin <[email protected]>
* meson: fix android vulkan buildEric Engestrom2020-07-141-1/+1
| | | | | | | | | | | | | | | | Android doesn't have `pthread_cancel()` and is unlikely to ever implement it [1], but `wsi_common_display.c` needs it (or an alternative). Let's just disable the platform on Android (as it used to be before 448eb19158f483d807ef). [1] https://android-review.googlesource.com/c/platform/bionic/+/1215779/1/docs/status.md Fixes: 448eb19158f483d807ef ("vulkan: automatically compile the `display` platform when available") Signed-off-by: Eric Engestrom <[email protected]> Acked-by: Nataraj Deshpande <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5860>
* meson/intel: add missing dep on git_sha1.hEric Engestrom2020-07-131-1/+1
| | | | | | | | Fixes: 805b32cab90547a576af ("intel: add identifier for debug purposes") Signed-off-by: Eric Engestrom <[email protected]> Reviewed-by: Dylan Baker <[email protected]> Acked-by: Lionel Landwerlin <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5882>
* intel/compiler: don't propagate cmp to add if add is saturatedYevhenii Kolesnikov2020-07-112-3/+118
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | From the Kaby Lake PRM Vol. 7 "Assigning Conditional Flags": * Note that the [post condition signal] bits generated at the output of a compute are before the .sat. Paragraph about post_zero does not mention saturation, but testing it on actual GPUs shows that conditional modifiers are applied after saturation. * post_zero bit: This bit reflects whether the final result is zero after all the clamping, normalizing, or format conversion logic. For signed types we don't care about saturation: it won't change the result of conditional modifier. For floating and unsigned types there two special cases, when we can remove inst even if scan_inst is saturated: G and LE. Since conditional modifiers are just comparations against zero, saturating positive values to the upper limit never changes the result of comparation. For negative values: (sat(x) > 0) == (x > 0) --- false (sat(x) <= 0) == (x <= 0) --- true Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2610 Signed-off-by: Yevhenii Kolesnikov <[email protected]> Reviewed-by: Matt Turner <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4167>
* anv: fix uninitialized variable accessLionel Landwerlin2020-07-103-7/+9
| | | | | | | | | | | | | | | | | | | | | | | | | Found with valgrind : ==415016== Conditional jump or move depends on uninitialised value(s) ==415016== at 0x513C22B: anv_cache_lock (anv_pipeline_cache.c:346) ==415016== by 0x513C2A0: anv_pipeline_cache_search (anv_pipeline_cache.c:364) ==415016== by 0x50E7C88: lookup_blorp_shader (anv_blorp.c:38) ==415016== by 0x5D20A98: blorp_params_get_clear_kernel (blorp_clear.c:60) ==415016== by 0x5D23EFD: blorp_ccs_ambiguate (blorp_clear.c:1358) ==415016== by 0x50EDE25: anv_image_ccs_op (anv_blorp.c:1882) ==415016== by 0x555D92F: transition_color_buffer (genX_cmd_buffer.c:1179) ==415016== by 0x5598B71: cmd_buffer_begin_subpass (genX_cmd_buffer.c:5060) ==415016== by 0x559AB00: gen9_CmdBeginRenderPass (genX_cmd_buffer.c:5772) ==415016== by 0x11DACE: begin_render_pass (vr-test.c:375) ==415016== by 0x11DF55: set_state (vr-test.c:529) ==415016== by 0x11F7A1: clear (vr-test.c:1228) v2: Don't break external sync feature Signed-off-by: Lionel Landwerlin <[email protected]> Acked-by: Jason Ekstrand <[email protected]> Reviewed-by: Ivan Briano <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5823>
* vulkan: automatically compile the `display` platform when availableEric Engestrom2020-07-101-1/+1
| | | | | | | Signed-off-by: Eric Engestrom <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Emil Velikov <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3161>
* intel/compiler/fs: Still attempt simd32 when INTEL_DEBUG=no16 is usedJordan Justen2020-07-091-1/+3
| | | | | | | | | | | | | | | | | If INTEL_DEBUG=no16 is used, then simd16 will not be attempted. This, in turn prevents simd32 from running, because we attempt to skip simd32 when simd16 fails to compile. This change more accurately recognizes when we attempted simd16, but simd16 failed. One easy way to cause an issue is to set both no8 and no16. Before this change, we would be left with no FS program, even though simd32 could still be generated in some cases. Signed-off-by: Jordan Justen <[email protected]> Reviewed-by: Caio Marcelo de Oliveira Filho <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5269>
* intel/compiler/cs: Allow simd32 in some more cases with no8 and/or no16Jordan Justen2020-07-091-1/+1
| | | | | | | | | | | | | | | | If no16 was specified, and the shader can't run in simd8 due to the local_size, then we need to generate a simd32 program. If both no8 and no16 are specified, then we need to generate a simd32 program. Rework: * Drop update of `if` that would have changed `do32` to try simd32 even if simd16 spilled registers. (Caio) Signed-off-by: Jordan Justen <[email protected]> Reviewed-by: Caio Marcelo de Oliveira Filho <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5269>
* anv: Handle clamping of inverted depth rangesJason Ekstrand2020-07-071-2/+10
| | | | | | Tested-by: Mike Blumenkrantz <[email protected]> Reviewed-by: Ivan Briano <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5792>
* anv: garbage collect timeline semaphore when querying valueLionel Landwerlin2020-07-061-0/+1
| | | | | | | | | | | | If we don't garbage collect the timeline, the value never progresses even though work completed. Signed-off-by: Lionel Landwerlin <[email protected]> Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3226 Fixes: 34f32a6d664807 ("anv: implement VK_KHR_timeline_semaphore") Reviewed-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5774>
* intel/perf: move query_mask and location out of gen_perf_query_counterMarcin Ślusarz2020-07-063-38/+56
| | | | | | | Signed-off-by: Marcin Ślusarz <[email protected]> Reviewed-by: Lionel Landwerlin <[email protected]> Reviewed-by: Mark Janes <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5399>
* iris: remove iris_monitor_configMarcin Ślusarz2020-07-062-0/+11
| | | | | | | | | | | | | | | | | | | perf_cfg is enough - it already contains almost all necessary information and is constructed in a more optimal way (O(n) vs O(n^2) - it uses hash table to build the unique counter list). "Almost all", because it doesn't contain OA raw counters, but we should have not exposed them anyway. Quoting Mark Janes: "I see no reason to include the OA raw counters in the list that are provided to the user. They are unusable. The MDAPI library can be used to configure raw counters in a way that provides esoteric metrics, but that library is written against INTEL_performance_query." Signed-off-by: Marcin Ślusarz <[email protected]> Reviewed-by: Lionel Landwerlin <[email protected]> Reviewed-by: Mark Janes <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5399>
* intel/compiler: add and fix up fallthrough comments for gcc warningsTimothy Arceri2020-07-022-4/+4
| | | | | Reviewed-by: Lionel Landwerlin <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5714>
* anv: update fallthrough comment so gcc sees itTimothy Arceri2020-07-021-1/+1
| | | | | Reviewed-by: Lionel Landwerlin <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5714>
* intel/compiler: Don't emit no-op cr0 changesMatt Turner2020-07-021-0/+3
| | | | | | | If mask is 0, we're asking for no changes to cr0. Reviewed-by: Lionel Landwerlin <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5566>
* intel/compiler: Add assert that set bits are within maskMatt Turner2020-07-021-2/+5
| | | | | | | | | | | | | We generate bitfields of bits that we want to retain (mask) and bits that we want to set (brw_mode) in the cr0 register, so the bits we want to set should be in the set of bits we want to retain. Also, remove the initialization of mask from fs_visitor::emit_shader_float_controls_execution_mode since brw_rnd_mode_from_nir initializes the mask parameter unconditionally. Reviewed-by: Lionel Landwerlin <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5566>
* anv: disable i915_perf warning on non-LinuxJan Beich2020-06-301-2/+2
| | | | | | | | $ vkcube INTEL-MESA: warning: Performance support disabled, consider sysctl dev.i915.perf_stream_paranoid=0 Reviewed-by: Lionel Landwerlin <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5461>
* anv: Align "used" attribute to 64 bits.Rafael Antognolli2020-06-251-2/+5
| | | | | | | | | | This is a 64 bits value that might not be aligned on 32 bit plaforms. Since it's used with atomics, let's make sure it gets properly aligned to avoid any potential performance loss. Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Lionel Landwerlin <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5637>
* intel: Disable loading drivers on DG1 devices for nowKenneth Graunke2020-06-241-1/+1
| | | | | | | | | | | | | | | | | Kernel support for DG1 has not yet been merged upstream; per our long-standing DRM subsystem policy, we should not enable the platform in userspace until the kernel patches are merged and functional. We will re-enable this in the future. In the meantime, we retain all of the infrastructure and code for the platform so that we can continue developing DG1 support in upstream. See a discussion here: https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4956#note_547775 Acked-by: Daniel Vetter <[email protected]> Acked-by: Jason Ekstrand <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5617>
* anv/cmd_buffer: Split GPGPU_WALKER out to emit_gpgpu_walkerJordan Justen2020-06-241-32/+32
| | | | | | Signed-off-by: Jordan Justen <[email protected]> Reviewed-by: Lionel Landwerlin <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5571>
* anv/pipeline: Split VFE/INTERFACE_DESCRIPTOR out to emit_media_cs_stateJordan Justen2020-06-241-49/+56
| | | | | | Signed-off-by: Jordan Justen <[email protected]> Reviewed-by: Lionel Landwerlin <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5571>
* intel/eu: Add the RNDU opcodeJason Ekstrand2020-06-232-0/+2
| | | | | | | | | | | We don't want to use it on gen5 and earlier because only RNDD can be done with a single instruction and we can implement RNDU(x) as -RNDD(-x) so it's better to just do that when we have the instruction. On gen6 and above, we may as well just use the right instruction. Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Kristian H. Kristensen <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5596>
* intel/eu: Set the right subnr for ALIGN16 destinationsJason Ekstrand2020-06-231-1/+1
| | | | | Reviewed-by: Kristian H. Kristensen <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5596>
* intel/eu: Add a brw_urb_dest_msg_type helperJason Ekstrand2020-06-231-0/+8
| | | | | | Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Kristian H. Kristensen <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5596>
* intel/eu: Add a brw_urb_desc helperKenneth Graunke2020-06-231-0/+22
| | | | | | Reviewed-by: Jason Ekstrand <[email protected]> Reviewed-by: Kristian H. Kristensen <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5596>
* intel/compiler: Expose brw_texture_offset to CJason Ekstrand2020-06-231-3/+3
| | | | | | | | | Some day we probably want to move it out of brw_shader if we're going to share it with IBC but that can be another day. Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Kristian H. Kristensen <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5596>
* intel/fs: Move more prog_data setup into populate_wm_prog_dataJason Ekstrand2020-06-232-20/+20
| | | | | | Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Kristian H. Kristensen <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5596>
* intel/fs: Break wm_prog_data setup into a helperJason Ekstrand2020-06-232-30/+43
| | | | | | Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Kristian H. Kristensen <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5596>
* intel/fs: Expose a couple of NIR lowering helpersJason Ekstrand2020-06-232-6/+9
| | | | | | Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Kristian H. Kristensen <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5596>
* anv: Bump the advertised patch version to 145Jason Ekstrand2020-06-221-1/+1
| | | | Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5597>
* anv: Make use of devinfo has_aux_map fieldJordan Justen2020-06-223-13/+16
| | | | | | | | | Reworks: * Use device rather than physical_device for info. (Lionel) Signed-off-by: Jordan Justen <[email protected]> Reviewed-by: Lionel Landwerlin <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5572>
* util: rename xmlpool.h to driconf.hEric Engestrom2020-06-221-1/+1
| | | | | | | To make it clearer what it is and does. Signed-off-by: Eric Engestrom <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5440>
* driconf: drop now unused translation facilityEric Engestrom2020-06-221-1/+0
| | | | | Signed-off-by: Eric Engestrom <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5440>
* intel/dev: Add device info for DG1Jordan Justen2020-06-221-0/+12
| | | | | | | | | | | | | Reworks: * Anuj: Set is_dg1 * Anuj: Add dg1 to gen_device_name_to_pci_device_id * Anuj: Update simulator id * Rafael: has_llc = false Signed-off-by: Jordan Justen <[email protected]> Signed-off-by: Anuj Phogat <[email protected]> Reviewed-by: Lionel Landwerlin <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4956>
* anv/dg1: Don't use SET_TILING kernel uapi.Rafael Antognolli2020-06-222-4/+20
| | | | | | | It is not available on discrete platforms anymore. Reviewed-by: Jordan Justen <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4956>
* intel/devinfo: Add function to check for DRM_I915_GEM_GET_TILING.Rafael Antognolli2020-06-222-0/+29
| | | | | | | | | Future (discrete) platforms won't have support for get/set tiling. This function allows our drivers to query for that, by simply trying to get the tiling from a dummy buffer. Reviewed-by: Jordan Justen <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4956>
* intel/l3: Return the URB size from devinfo for DG1Rafael Antognolli2020-06-221-0/+4
| | | | | | | | | We don't have any URB size set in the L3 config, since it's a fixed value now. So just return the value that we know from gen_device_info. Reviewed-by: Jordan Justen <[email protected]> Acked-by: Lionel Landwerlin <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4956>
* intel/isl: Update mocs for DG1Rafael Antognolli2020-06-221-5/+14
| | | | | | Reviewed-by: Jordan Justen <[email protected]> Acked-by: Lionel Landwerlin <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4956>
* intel/l3: Add DG1 L3 configurationAnuj Phogat2020-06-221-1/+12
| | | | | | | | | | | Reworks: * Jordan: Make DG1 L3 config table empty Signed-off-by: Anuj Phogat <[email protected]> Signed-off-by: Jordan Justen <[email protected]> Acked-by: Lionel Landwerlin <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4956>
* anv: Set L3 full way allocation at context init if L3 cfg is NULLJordan Justen2020-06-222-1/+15
| | | | | | | | | | | | | | If the platform's default L3 config is NULL, then it now gets initialized only at context init time, and cmd_buffer_config_l3 will always return immediately. Rework: * Remove unneeded check on !cfg in cmd_buffer_config_l3 (Jason) Signed-off-by: Jordan Justen <[email protected]> Reviewed-by: Lionel Landwerlin <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4956>
* intel/l3: Allow platforms to have no l3 configurationsJordan Justen2020-06-221-4/+10
| | | | | | | | | | | | On some gen12 platforms we will use the L3FullWayAllocationEnable and never reconfigure the L3 setup. Suggested-by: Kenneth Graunke <[email protected]> Signed-off-by: Jordan Justen <[email protected]> Reviewed-by: Lionel Landwerlin <[email protected]> Reviewed-by: Francisco Jerez <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4956>
* intel/l3: Don't rely on cfg entry URB size being 0 as a sentinalJordan Justen2020-06-221-20/+32
| | | | | | | | | An example entry with URB size being 0 is in the cnl list. Signed-off-by: Jordan Justen <[email protected]> Reviewed-by: Lionel Landwerlin <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4956>
* intel/devinfo: Add is_dg1 to device infoAnuj Phogat2020-06-221-0/+1
| | | | | | | Reviewed-by: Jordan Justen <[email protected]> Reviewed-by: Lionel Landwerlin <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4956>
* intel/compiler: Always apply sample mask on Vulkan.Arcady Goldmints-Orlov2020-06-193-2/+5
| | | | | | | | | | | With OpenGL, shader writes to the sample mask are ignored when not rendering to a multisample render target. However, on Vulkan, writes to the sample mask have still have their effect in that case. Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3016 Reviewed-by: Jason Ekstrand <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5156>
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-23 20:55:01 +0000