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* anv: gem-stubs: return a valid fd got anv_gem_userptr()Lionel Landwerlin2019-09-251-1/+7
* i965/fs: set rounding mode when emitting the flrp instructionAndres Gomez2019-09-241-0/+7
* i965/fs: add a comment about how the rounding mode in fmul is setAndres Gomez2019-09-241-0/+4
* intel: Increase Gen11 compute shader scratch IDs to 64.Kenneth Graunke2019-09-231-1/+13
* Revert "intel/gen11+: Enable Hardware filtering of Semi-Pipelined State in WM"Kenneth Graunke2019-09-231-11/+0
* intel/genxml: Stop manually scrubbing 'α' -> "alpha"Kenneth Graunke2019-09-232-2/+1
* isl: Drop WaDisableSamplerL2BypassForTextureCompressedFormats on Gen11Kenneth Graunke2019-09-201-1/+1
* anv: Advertise VK_KHR_shader_subgroup_extended_typesJason Ekstrand2019-09-202-0/+8
* intel/fs: Do 8-bit subgroup scan operations in 16 bitsJason Ekstrand2019-09-201-3/+39
* intel/fs: Allow CLUSTER_BROADCAST to do type conversionJason Ekstrand2019-09-201-1/+1
* intel/fs: Allow UB, B, and HF types in brw_nir_reduction_op_identityJason Ekstrand2019-09-201-1/+7
* intel/fs: don't forget the stride at generate_shufflePaulo Zanoni2019-09-201-1/+2
* util/rb_tree: Reverse the order of comparison functionsJason Ekstrand2019-09-201-2/+2
* anv: implement ICD interface v4Eric Engestrom2019-09-201-1/+29
* anv: split instance dispatch tableEric Engestrom2019-09-203-1/+198
* Move blob from compiler/ to util/Jason Ekstrand2019-09-191-1/+1
* intel/fs: Add Fall-through commentCaio Marcelo de Oliveira Filho2019-09-191-0/+3
* anv: fix descriptor limits on gen8Arcady Goldmints-Orlov2019-09-192-4/+6
* intel/fs: fix SHADER_OPCODE_CLUSTER_BROADCAST for SIMD32Paulo Zanoni2019-09-191-1/+10
* intel/fs: the maximum supported stride width is 16Paulo Zanoni2019-09-191-1/+3
* intel/fs: roll the loop with the <0,1,0> additions in emit_scan()Paulo Zanoni2019-09-191-32/+14
* intel/fs: make scan/reduce work with SIMD32 when it fits 2 registersPaulo Zanoni2019-09-191-0/+23
* intel/compiler: Record whether any pull constant loads occurKenneth Graunke2019-09-183-0/+11
* intel/compiler: Set "Null Render Target" ex_desc bit on Gen11Kenneth Graunke2019-09-171-0/+3
* anv: enable VK_KHR_shader_float_controls and SPV_KHR_float_controlsSamuel Iglesias Gonsálvez2019-09-173-0/+33
* i965/fs: add support for shader float control to remove_extra_rounding_modes()Samuel Iglesias Gonsálvez2019-09-171-1/+14
* i965/fs: set rounding mode when emitting nir_op_f2f32 or nir_op_f2f16Samuel Iglesias Gonsálvez2019-09-171-5/+27
* i965/fs: set rounding mode when emitting fadd, fmul and ffma instructionsSamuel Iglesias Gonsálvez2019-09-171-1/+34
* i965/fs: add emit_shader_float_controls_execution_mode() and aux functionsSamuel Iglesias Gonsálvez2019-09-173-0/+61
* i965/fs/generator: add new opcode to set float controls modes in control regi...Samuel Iglesias Gonsálvez2019-09-173-0/+19
* i965/fs/generator: refactor rounding mode helper in preparation for float con...Samuel Iglesias Gonsálvez2019-09-173-35/+32
* i965/fs/nir: add nir_op_unpack_half_2x16_split_*_flush_to_zeroSamuel Iglesias Gonsálvez2019-09-171-0/+4
* intel/nir: do not apply the fsin and fcos trig workarounds for constsSamuel Iglesias Gonsálvez2019-09-171-2/+2
* nir/large_constants: pass after lowering copy_derefSergii Romantsov2019-09-161-7/+7
* vulkan: add vk_x11_strict_image_count optionLionel Landwerlin2019-09-151-0/+1
* driconfig: add a new engine name/version parameterLionel Landwerlin2019-09-151-1/+3
* intel/fs: Handle UNDEF in split_virtual_grfsJason Ekstrand2019-09-131-1/+25
* intel/gen11+: Enable Hardware filtering of Semi-Pipelined State in WMAnuj Phogat2019-09-111-0/+11
* genxml/gen11+: Add COMMON_SLICE_CHICKEN4 registerAnuj Phogat2019-09-112-0/+10
* android: anv: libmesa_vulkan_common: add libmesa_util static dependencyMauro Rossi2019-09-081-1/+2
* intel/blorp: Use wide formats for nicely aligned stencil clearsJason Ekstrand2019-09-062-0/+122
* intel/blorp: Expose surf_fake_interleaved_msaa internallyJason Ekstrand2019-09-062-5/+8
* intel/blorp: Expose surf_retile_w_to_y internallyJason Ekstrand2019-09-062-5/+8
* blorp: Memset surface info to zero when initializing itJason Ekstrand2019-09-061-0/+1
* intel/tools: Decode PS kernels on SNBJason Ekstrand2019-09-061-1/+4
* intel/tools: Decode 3DSTATE_BINDING_TABLE_POINTERS on SNBJason Ekstrand2019-09-061-0/+15
* anv: add support for vk_x11_override_min_image_countEric Engestrom2019-09-061-0/+3
* anv: add support for driconfEric Engestrom2019-09-064-3/+19
* anv,iris: L3ALLOC register replaces L3CNTLREG for gen12Jordan Justen2019-09-062-7/+16
* intel/gen12: Add L3 configurationsAnuj Phogat2019-09-061-1/+12
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