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* anv: Fix VK_EXT_transform_feedback working with varyings packed in PSIZDanylo Piliaiev2019-02-041-3/+20
| | | | | | | | | | | | | Transform feedback did not set correct SO_DECL.ComponentMask for varyings packed in VARYING_SLOT_PSIZ: gl_Layer - VARYING_SLOT_LAYER in VARYING_SLOT_PSIZ.y gl_ViewportIndex - VARYING_SLOT_VIEWPORT in VARYING_SLOT_PSIZ.z gl_PointSize - VARYING_SLOT_PSIZ in VARYING_SLOT_PSIZ.w Fixes: 36ee2fd61c8f94 "anv: Implement the basic form of VK_EXT_transform_feedback" Signed-off-by: Danylo Piliaiev <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* anv: Implement transform feedback queriesJason Ekstrand2019-01-221-0/+1
| | | | Reviewed-by: Lionel Landwerlin <[email protected]>
* anv: Implement the basic form of VK_EXT_transform_feedbackJason Ekstrand2019-01-221-0/+122
| | | | Reviewed-by: Lionel Landwerlin <[email protected]>
* anv: Always emit at least one vertex elementJason Ekstrand2019-01-221-3/+1
| | | | | | | | | This seems to make the simulator happier. The early return wasn't really protecting anything and the code that follows will happily initialize the dummy element to STORE_0 and emit it. Reviewed-by: Alejandro Piñeiro <[email protected]> Reviewed-by: Lionel Landwerlin <[email protected]>
* anv: Remove state flush.Rafael Antognolli2019-01-171-1/+0
| | | | | | | We have all the state buffers snooped, so we don't need to clflush everything anymore. Reviewed-by: Jason Ekstrand <[email protected]>
* anv/pipeline: remove unnecessary null-pointer checkAndrii Simiklit2019-01-091-4/+2
| | | | | | | | | | | | Looks like it is impossible that 'last' variable is a null because at least the get_vs_prog_data shouldn't return a null pointer. So this check is unnecessary starts from commit: 99d497c5b691 "anv/pipeline: Replace get_fs_input_map with ..." This small issue is found by cppcheck. Signed-off-by: Andrii Simiklit <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* anv: drop unneeded KHR suffixEric Engestrom2019-01-081-5/+5
| | | | | Signed-off-by: Eric Engestrom <[email protected]> Acked-by: Jason Ekstrand <[email protected]>
* anv/pipeline: Set the correct binding count for compute shadersJason Ekstrand2018-12-121-2/+6
| | | | Reviewed-by: Kenneth Graunke <[email protected]>
* anv/icl: Disable prefetching of sampler state entriesAnuj Phogat2018-11-021-9/+16
| | | | | | | | | | | WA_1606682166: Incorrect TDL's SSP address shift in SARB for 16:6 & 18:8 modes. Disable the Sampler state prefetch functionality in the SARB by programming 0xB000[30] to '1'. This is to be done at boot time and the feature must remain disabled permanently. Signed-off-by: Anuj Phogat <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* anv: Disable dual source blending when shader doesn't support it on gen8+Danylo Piliaiev2018-10-301-10/+36
| | | | | | | | | | | | | | | | | | | | | | | | | Dual source blending behaviour is undefined when shader doesn't have second color output. "If SRC1 is included in a src/dst blend factor and a DualSource RT Write message is not used, results are UNDEFINED. (This reflects the same restriction in DX APIs, where undefined results are produced if “o1” is not written by a PS – there are no default values defined)." Dismissing fragment in such situation leads to a hang on gen8+ if depth test in enabled. Since blending cannot be gracefully fixed in such case and the result is undefined - blending is simply disabled. v2 (Jason Ekstrand): - Apply the workaround to each individual entry - Emit a warning through debug_report Signed-off-by: Danylo Piliaiev <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* Revert "anv/skylake: disable ForceThreadDispatchEnable"Jason Ekstrand2018-10-261-35/+7
| | | | | | | | | | This reverts commit 0fa9e6d7b304f6a8064ed78a4b9c557e1026e7e5. The real issue appears to have been that HiZ ops don't like having WM thread dispatch force-enabled. The previous commit fixes that problem so we can go back to using the ForceThreadDispatchEnable bit even on SKL+. Cc: [email protected] Reviewed-by: Kenneth Graunke <[email protected]>
* anv: Fix sanitization of stencil state when the depth test is disabledAlex Smith2018-10-261-7/+7
| | | | | | | | | | | | | | | | When depth testing is disabled, we shouldn't pay attention to the specified depthCompareOp, and just treat it as always passing. Before, if the depth test is disabled, but depthCompareOp is VK_COMPARE_OP_NEVER (e.g. from the app having zero-initialized the structure), then sanitize_stencil_face() would have incorrectly changed passOp to VK_STENCIL_OP_KEEP. v2: Roll the depthTestEnable check into the ds_aspect check below since they now both do the same thing. Fixes: 028e1137e6 "anv/pipeline: Be smarter about depth/stencil state" Signed-off-by: Alex Smith <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* anv/skylake: disable ForceThreadDispatchEnableSergii Romantsov2018-10-161-7/+35
| | | | | | | | | | | | | | | | On Skylake enabling of ForceThreadDispatchEnable causes gpu-hang. -v2: enabling of ForceThreadDispatchEnable is only for gen8, for gen9 and higher reverted enabling of PixelShaderHasUAV. -v3 (Jason Ekstrand): Rework the comments a bit. CC: Jason Ekstrand <[email protected]> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107941 Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107760 Fixes: 79270d2140ec (anv: Stop setting 3DSTATE_PS_EXTRA::PixelShaderHasUAV) Signed-off-by: Sergii Romantsov <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* anv: Disable the vertex cache when tessellating on SKL GT4Jason Ekstrand2018-09-071-1/+22
| | | | | | | | | | | I have no idea if I'm correct about what's going wrong or if this is the correct fix. However, in my multiple weeks of banging my head on this hang, a VUE reference counting bug seems to match all the symptoms and it definitely fixes the hang. Cc: [email protected] Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107280 Reviewed-by: Kenneth Graunke <[email protected]>
* anv/pipeline: Only consider double elements which actually existJason Ekstrand2018-09-061-1/+2
| | | | | | | | | | | | The brw_vs_prog_data::double_inputs_read field comes directly from shader_info::double_inputs which may contain inputs which are not actually read. Instead of using it directly, AND it with inputs_read which is only things which are read. Otherwise, we may end up subtracting too many elements when computing elem_count. Cc: [email protected] Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=103241 Reviewed-by: Lionel Landwerlin <[email protected]>
* anv: Fill holes in the VF VUE to zeroJason Ekstrand2018-08-251-1/+28
| | | | | | | | This fixes a GPU hang in DOOM 2016 running under wine. Cc: [email protected] Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=104809 Reviewed-by: Lionel Landwerlin <[email protected]>
* anv/icl: Disable binding table prefetchingAnuj Phogat2018-08-211-6/+15
| | | | | | | | | | Gen 11 workarounds table #2056 WABTPPrefetchDisable suggests to disable prefetching of binding tables for ICLLP A0 and B0 steppings. We have a similar patch for i965 driver in Mesa commit a5889d70. Signed-off-by: Anuj Phogat <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* anv/pipeline: Drop anv_pipeline_add_compiled_stageJason Ekstrand2018-08-021-2/+0
| | | | | | | We can set active_stages much more directly and then it's just candy around setting pipeline->stages[stage]. Reviewed-by: Timothy Arceri <[email protected]>
* anv: Stop setting 3DSTATE_PS_EXTRA::PixelShaderHasUAVJason Ekstrand2018-07-221-31/+22
| | | | | | | | | | | | | | We've had several broadwell hangs that have come down to this bit just not working correctly. Most recently, we've had a pile of hangs reported with apps running under DXVK: https://github.com/doitsujin/dxvk/issues/469 Instead, use the bit that doesn't try to imply weird D3D coherency things and just force-enables the PS like we want. cc: [email protected] Reviewed-by: Kenneth Graunke <[email protected]>
* anv/gen9: expose VK_EXT_post_depth_coverageIlia Mirkin2018-07-221-2/+8
| | | | | | | | | | Note that the use of ICMS_INNER_CONSERVATIVE disagrees with the GL driver. Perhaps it's more performant than ICMS_NORMAL and is otherwise permitted? Not sure, so I left it as-is. Signed-off-by: Ilia Mirkin <[email protected]> Reviewed-by: Lionel Landwerlin <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* anv/pipeline: Add a per-VB instance divisorJason Ekstrand2018-07-091-6/+2
| | | | Reviewed-by: Caio Marcelo de Oliveira Filho <[email protected]>
* anv/pipeline: Use a per-VB struct instead of separate arraysJason Ekstrand2018-07-091-1/+1
| | | | Reviewed-by: Caio Marcelo de Oliveira Filho <[email protected]>
* anv: Make subpass::depth_stencil_attachment a pointerJason Ekstrand2018-07-091-4/+4
| | | | | | | | This makes certain checks a bit easier and means that we don't have the attachment information duplicated in the attachment list and in depth_stencil_attachment. Reviewed-by: Lionel Landwerlin <[email protected]>
* anv: Use a default pipeline cache if none is specifiedJason Ekstrand2018-07-021-0/+8
| | | | | | | | If a client is dumb enough to not specify a pipeline cache, give it a default. We have to create one anyway for blorp so we may as well let the client cache shaders in it. Reviewed-by: Timothy Arceri <[email protected]>
* intel/anv,blorp,i965: Implement the SKL 16x MSAA SIMD32 workaroundJason Ekstrand2018-06-281-2/+18
| | | | Reviewed-by: Kenneth Graunke <[email protected]>
* intel/fs: Add fields to wm_prog_data for SIMD32 dispatchJason Ekstrand2018-06-281-1/+1
| | | | Reviewed-by: Matt Turner <[email protected]>
* intel/compiler: Add and use helpers for working with KSP indicesJason Ekstrand2018-06-281-7/+11
| | | | | | | | The pixel shader dispatch table is kind-of a confusing mess. This adds some helpers for dealing with it and for easily extracting the correct data from wm_prog_data. Reviewed-by: Matt Turner <[email protected]>
* anv: enable VK_EXT_shader_stencil_exportGustavo Lima Chaves2018-06-081-0/+1
| | | | Reviewed-by: Jason Ekstrand <[email protected]>
* anv: ignore pColorBlendState if all color attachments of the subpass are unusedSamuel Iglesias Gonsálvez2018-05-091-1/+1
| | | | | | | | | | | | | | | | | | | According to Vulkan spec: "pColorBlendState is a pointer to an instance of the VkPipelineColorBlendStateCreateInfo structure, and is ignored if the pipeline has rasterization disabled or if the subpass of the render pass the pipeline is created against does not use any color attachments." Fixes tests from CL#2505: dEQP-VK.renderpass.*.simple.color_unused_omit_blend_state v2: - Check that blend is not NULL before usage. Signed-off-by: Samuel Iglesias Gonsálvez <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* nir: Offset vertex_id by first_vertex instead of base_vertexNeil Roberts2018-04-191-3/+1
| | | | | | | | | | | | | | | | | | base_vertex will be zero for non-indexed calls and in that case we need vertex_id to be offset by the ‘first’ parameter instead. That is what we get with first_vertex. This is true for both GL and Vulkan. The freedreno driver is also setting vertex_id_zero_based on nir_options. In order to avoid breakage this patch switches the relevant code to handle SYSTEM_VALUE_FIRST_VERTEX so that it can retain the same behavior. v2: change a3xx/fd3_emit.c and a4xx/fd4_emit.c from SYSTEM_VALUE_BASE_VERTEX to SYSTEM_VALUE_FIRST_VERTEX (Kenneth). Reviewed-by: Ian Romanick <[email protected]> Cc: Rob Clark <[email protected]> Acked-by: Marek Olšák <[email protected]>
* spirv: Lower BaseVertex to FIRST_VERTEX instead of BASE_VERTEXNeil Roberts2018-04-191-0/+2
| | | | | | | | | | | | | The base vertex in Vulkan is different from GL in that for non-indexed primitives the value is taken from the firstVertex parameter instead of being set to zero. This coincides with the new SYSTEM_VALUE_FIRST_VERTEX instead of BASE_VERTEX. v2 (idr): Add comment describing why SYSTEM_VALUE_FIRST_VERTEX is used for SpvBuiltInBaseVertex. Suggested by Jason. Reviewed-by: Ian Romanick <[email protected]> [v1] Reviewed-by: Jason Ekstrand <[email protected]>
* anv/pipeline: set active_stages earlyCaio Marcelo de Oliveira Filho2018-03-191-0/+1
| | | | | | | | | | | | | | Since the intermediate states of active_stages are not used, i.e. active_stages is read only after all stages were set into it, just set its value before compiling the shaders. This will allow to conditionally run certain passes based on what other shaders are being used, e.g. a certain pass might only be applicable to the vertex shader if there's no geometry or tessellation shader being used. v2: Use vk_to_mesa_shader_stage. (Lionel) Reviewed-by: Lionel Landwerlin <[email protected]>
* vulkan: Rename multiview from KHX to KHRJason Ekstrand2018-03-071-1/+1
| | | | | | Reviewed-by: Lionel Landwerlin <[email protected]> Reviewed-by: Samuel Iglesias Gonsálvez <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* intel: Drop SURFACE_FORMAT enum from genxml.Kenneth Graunke2018-03-051-3/+3
| | | | | | | | | | | We want people to be using ISL_FORMAT_*, rather than the genxml format enumerations. This patch drops 10 separate copies, and drops a bunch of ugly casting. Reviewed-by: Jordan Justen <[email protected]> [[email protected]: Minor changes for rebase] Signed-off-by: Jordan Justen <[email protected]> Reviewed-by: Samuel Iglesias Gonsálvez <[email protected]>
* anv/icl: Don't use DISPATCH_MODE_SIMD4X2Anuj Phogat2018-02-161-0/+5
| | | | | Signed-off-by: Anuj Phogat <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* anv/icl: Don't use SingleVertexDispatchAnuj Phogat2018-02-161-0/+2
| | | | | Signed-off-by: Anuj Phogat <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* anv/icl: Don't set ResetGatewayTimerAnuj Phogat2018-02-161-0/+2
| | | | | Signed-off-by: Anuj Phogat <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* anv/pipeline: remove the pipeline layout field from anv_pipelineIago Toral Quiroga2018-01-261-1/+0
| | | | | | | It no longer has any users. Suggested-by: Jason Ekstrand <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* anv/pipeline: Don't look at blend state unless we have an attachmentJason Ekstrand2018-01-261-3/+3
| | | | | | | | | | | | Without this, we may end up dereferencing blend before we check for binding->index != UINT32_MAX. However, Vulkan allows the blend state to be NULL so long as you don't have any color attachments. This fixes a segfault when running The Talos Principal. Fixes: 12f4e00b69e724a23504b7bd3958fb75dc462950 Cc: [email protected] Reviewed-by: Alex Smith <[email protected]> Reviewed-by: Lionel Landwerlin <[email protected]>
* anv/pipeline: Don't assert on more than 32 samplersJason Ekstrand2018-01-231-1/+7
| | | | | | | | This prevents an assert when running one unreleased Vulkan game. Tested-by: Józef Kucia <[email protected]> Reviewed-by: Topi Pohjolainen <[email protected]> Cc: "18.0" <[email protected]>
* anv: Take write mask into account in has_color_buffer_write_enabledAlex Smith2018-01-051-9/+18
| | | | | | | | | | | | | | | | | | | | If we have a color attachment, but its writes are masked, this would have still returned true. This is inconsistent with how HasWriteableRT in 3DSTATE_PS_BLEND is set, which does take the mask into account. This could lead to PixelShaderHasUAV not being set in 3DSTATE_PS_EXTRA if the fragment shader does use UAVs, meaning the fragment shader may not be invoked because HasWriteableRT is false. Specifically, this was seen to occur when the shader also enables early fragment tests: the fragment shader was not invoked despite passing depth/stencil. Fix by taking the color write mask into account in this function. This is consistent with how things are done on i965. Signed-off-by: Alex Smith <[email protected]> Cc: [email protected] Reviewed-by: Iago Toral Quiroga <[email protected]> Reviewed-by: Lionel Landwerlin <[email protected]>
* anv/cmd_buffer: Add support for pushing UBO rangesJason Ekstrand2017-12-081-1/+2
| | | | | | | | In order to do this we have to modify push constant set up to handle ranges. We also have to tweak the way we handle dirty bits a bit so that we re-push whenever a descriptor set changes. Reviewed-by: Jordan Justen <[email protected]>
* anv: Fix assert about source attrs.Kenneth Graunke2017-10-271-1/+1
| | | | | | | | | Asserting slot >= 2 made sense when the URB read offset was always 1 (pair of slots). Commit 566a0c43f0b9fbf5106161471dd5061c7275f761 made it possible to read from the VUE header in slot 0, by adjusting the offset to be 0. So, this assert is now bogus. Use the one from GL. Reviewed-by: Jason Ekstrand <[email protected]>
* anv: Drop URB entry output read handling in 3DSTATE_XS.Kenneth Graunke2017-10-271-26/+0
| | | | | | | | | Commit 566a0c43f0b9fbf5106161471dd5061c7275f761 started setting the 3DSTATE_SBE bit to override these values with the one calculated there. So, they're dead. Stop setting them. Reviewed-by: Jason Ekstrand <[email protected]>
* anv: Add support for tessellation domain origin controlJason Ekstrand2017-09-201-10/+21
| | | | Reviewed-by: Kenneth Graunke <[email protected]>
* spirv: Flip the tessellation winding orderJason Ekstrand2017-09-201-1/+12
| | | | | | | | It's not SPIR-V that's backwards from GLSL, it's Vulkan that's backwards from GL. Let's make NIR consistent with the source language and do the flipping inside the Vulkan driver instead. Reviewed-by: Kenneth Graunke <[email protected]>
* anv: use device->info instead of brw->is_*Lionel Landwerlin2017-08-301-1/+1
| | | | | | Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Samuel Iglesias Gonsálvez <[email protected]> Reviewed-by: Emil Velikov <[email protected]>
* anv: set right datatypes in anv_pipeline_bindingJuan A. Suarez Romero2017-08-301-1/+1
| | | | | | | | | | | | | | This structure contains two fields, binding and index, that store the binding in the descriptor set and the index inside the binding. These structures are defined as uint8_t, but the types in Vulkan specification are uint32_t, so big values are clamp. This fixes dEQP-VK.binding_model.shader_access.*.multiple_arbitrary_descriptors.* v2: use UINT32_MAX for index when having no render targets (Tapani) Reviewed-by: Tapani Pälli <[email protected]>
* anv: Mark functions used conditionally as UNUSEDMatt Turner2017-08-291-2/+2
| | | | | | | | The functions we're marking as UNUSED in genX_pipeline.c are used only when compiling for particular generations. Reviewed-by: Emil Velikov <[email protected]> Reviewed-by: Eric Engestrom <[email protected]>
* anv: Explicitly cast between different enumsMatt Turner2017-08-291-3/+3
| | | | | | | | | | | | | Fixes warnings like warning: implicit conversion from enumeration type 'enum isl_format' to different enumeration type 'enum GEN10_SURFACE_FORMAT' [-Wenum-conversion] .SourceElementFormat = ISL_FORMAT_R32_UINT, ^~~~~~~~~~~~~~~~~~~ Reviewed-by: Emil Velikov <[email protected]> Reviewed-by: Eric Engestrom <[email protected]>
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