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path: root/src/intel/vulkan/genX_cmd_buffer.c
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* intel/isl: Implement D16_UNORM workarounds.Rafael Antognolli2020-03-031-2/+17
* anv: Wait for the GPU to be idle before invalidating the aux table.Rafael Antognolli2020-03-021-0/+10
* anv: Do end-of-pipe sync around MCS/CCS ops instead of CS stallJason Ekstrand2020-03-021-2/+2
* anv: Use a proper end-of-pipe sync instead of just CS stallJason Ekstrand2020-03-021-11/+113
* anv: Use the PIPE_CONTROL instead of bits for the CS stall W/AJason Ekstrand2020-03-021-3/+7
* anv: Remove unused field `urb.total_size`Caio Marcelo de Oliveira Filho2020-02-271-2/+2
* anv: Add pipe_state_for_stage() helperCaio Marcelo de Oliveira Filho2020-02-211-13/+24
* anv: set MOCS on push constantsLionel Landwerlin2020-02-061-1/+7
* anv: implement gen12 post sync pipe control workaroundLionel Landwerlin2020-02-051-1/+5
* anv: implement gen9 post sync pipe control workaroundLionel Landwerlin2020-02-051-0/+24
* anv: Always fill out the AUX table even if CCS is disabledJason Ekstrand2020-01-301-15/+17
* intel/genxml: Drop SLMEnable from L3CNTLREG on Gen11Jason Ekstrand2020-01-301-1/+1
* anv: Set actual state pool sizes when we have softpinJason Ekstrand2020-01-291-5/+13
* anv: Emit CS Stall before Instruction Cache flush for gen12 WAJordan Justen2020-01-281-0/+6
* anv: Replace one more aux_surface.isl.size_B checkJason Ekstrand2020-01-281-1/+1
* anv: Rework CCS memory handling on TGL-LPJason Ekstrand2020-01-251-9/+109
* anv: Make AUX table invalidate a PIPE_* bitJason Ekstrand2020-01-251-30/+18
* anv: Always initialize target_stencil_layoutCaio Marcelo de Oliveira Filho2020-01-241-2/+4
* anv: Replace aux_surface.isl.size_B checks with aux_usage checksJason Ekstrand2020-01-241-1/+1
* anv: Rework the meaning of anv_image::planes[]::aux_usageJason Ekstrand2020-01-241-1/+1
* anv: Improve BTI change cache flushingJason Ekstrand2020-01-241-7/+3
* anv: Add a usage parameter to anv_layout_to_aux_usageJason Ekstrand2020-01-241-4/+12
* anv: Use isl_aux_state for HiZ resolvesJason Ekstrand2020-01-241-19/+36
* anv: Use TRANSFER_SRC_OPTIMAL for depth/stencil MSAA resolvesJason Ekstrand2020-01-241-4/+4
* anv: initialize clear_color_is_zero_oneTapani Pälli2020-01-211-0/+5
* anv: Take a device in anv_perf_warnJason Ekstrand2020-01-201-5/+5
* anv: Take an anv_device in vk_errorfJason Ekstrand2020-01-201-1/+1
* anv: Add an anv_physical_device field to anv_deviceJason Ekstrand2020-01-201-8/+8
* anv: Drop some VK_IMAGE_TILING_OPTIMAL checksJason Ekstrand2020-01-171-1/+1
* anv: set depth stall enabled when depth flush enabled on gen12Tapani Pälli2020-01-161-0/+14
* anv: implement another workaround for non pipelined statesLionel Landwerlin2020-01-161-0/+12
* anv: Enable Vulkan 1.2 supportIván Briano2020-01-151-5/+5
* anv: fix pipeline switch back for non pipelined statesLionel Landwerlin2020-01-151-13/+8
* anv: Implement Gen12 workaround for non pipelined stateLionel Landwerlin2020-01-141-0/+27
* anv: Drop an unused variableJason Ekstrand2020-01-131-1/+0
* anv: Re-use flush_descriptor_sets in flush_compute_stateJason Ekstrand2020-01-091-65/+25
* anv: Flag descriptors dirty when gl_NumWorkgroups is usedJason Ekstrand2020-01-091-1/+8
* anv: Don't add dynamic state base address to push constants on Gen7Jason Ekstrand2020-01-091-14/+20
* anv: Re-emit all compute state on pipeline switchJason Ekstrand2019-12-071-0/+7
* anv: Use PIPE_CONTROL flushes to implement the gen8 VF cache WAJason Ekstrand2019-12-051-0/+180
* anv: Apply cache flushes after setting index/draw VBsJason Ekstrand2019-12-051-2/+35
* anv: Always invalidate the VF cache in BeginCommandBufferJason Ekstrand2019-12-051-2/+1
* anv: Use 3DSTATE_CONSTANT_ALL when possible.Rafael Antognolli2019-12-041-3/+90
* anv: Move code for emitting push constants into its own function.Rafael Antognolli2019-12-041-43/+57
* anv: Add get_push_range_address() helper.Rafael Antognolli2019-12-041-59/+70
* anv: Move gen8+ push constant packet workaround.Rafael Antognolli2019-12-041-4/+25
* anv: Respect the always_flush_cache driconf optionJason Ekstrand2019-12-031-0/+3
* anv: Push constants are relative to dynamic state on IVBJason Ekstrand2019-11-261-0/+17
* intel: Add workaround for stencil state.Rafael Antognolli2019-11-191-0/+14
* anv: Emit a NULL vertex for zero base_vertex/instanceJason Ekstrand2019-11-181-11/+16
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