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* anv/gen7_pipeline: Set multisample state using shared functionAnuj Phogat2016-08-091-16/+4
| | | | | Signed-off-by: Anuj Phogat <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* anv/pipeline/gen7: Set multisample modesLionel Landwerlin2016-08-081-2/+8
| | | | | | | | | | | | | | | | | Fixes the following failures : dEQP-VK.api.copy_and_blit.resolve_image.whole_4_bit dEQP-VK.api.copy_and_blit.resolve_image.whole_8_bit dEQP-VK.api.copy_and_blit.resolve_image.partial_4_bit dEQP-VK.api.copy_and_blit.resolve_image.partial_8_bit dEQP-VK.api.copy_and_blit.resolve_image.with_regions_4_bit dEQP-VK.api.copy_and_blit.resolve_image.with_regions_8_bit Tested on IVB/HSW Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Anuj Phogat <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* anv/pipeline/gen7: Set the depth format in 3DSTATE_SFJason Ekstrand2016-08-081-1/+2
| | | | | Signed-off-by: Jason Ekstrand <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* anv/pipeline: Unify 3DSTATE_RASTER and 3DSTATE_SF setup between gen7 and gen8Jason Ekstrand2016-08-081-42/+1
| | | | | Signed-off-by: Jason Ekstrand <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* genxml: Make 3DSTATE_SF more consistent between gen7 and gen8+Jason Ekstrand2016-08-081-2/+2
| | | | | Signed-off-by: Jason Ekstrand <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* anv/gen7_pipeline: Set PixelShaderKillPixel for discardsNanley Chery2016-08-051-0/+1
| | | | | | | | | | According to the IVB PRM Vol2 P1, this bit must be set if a pixel shader contains a discard instruction. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=97207 Cc: "12.0" <[email protected]> Signed-off-by: Nanley Chery <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* anv: Perform rasterizer discard in the SOL stage instead of the clipper.Kenneth Graunke2016-07-301-0/+1
| | | | | | | | | See commit b0629e6894513a2c49a018bc3342a4e55435a236, where we discovered that the SOL stage's "Rendering Disable" feature is a lot faster at throwing away all geometry than the clipper's "reject all" mode. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* anv: Unify 3DSTATE_CLIP code across generations.Kenneth Graunke2016-07-201-21/+2
| | | | | | | | | | The bulk of this is the same. There are just a couple fields that only exist on one generation or another, and we can easily handle those with an #ifdef. Cc: "12.0" <[email protected]> Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* anv: Enable early culling on Gen7.Kenneth Graunke2016-07-201-0/+1
| | | | | | | | We set the cull mode, but forgot the enable bit. Gen8 uses this. Cc: "12.0" <[email protected]> Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* anv: Fix near plane clipping on Gen7/7.5.Kenneth Graunke2016-07-201-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Gen7/7.5 clip code used APIMODE_OGL, while the Gen8+ clip code used APIMODE_D3D. The meaning hasn't changed, so one of these must be wrong. It appears that the hardware documentation is completely wrong. It claims that the "API Mode" bit means: 0h APIMODE_OGL NEAR_VP boundary == 0.0 (NDC) 1h APIMODE_D3D NEAR_VP boundary == -1.0 (NDC) However, DirectX typically uses 0.0 for the near plane, while unextended OpenGL uses -1.0. i965's gen6_clip_state.c uses APIMODE_D3D for the GL_ZERO_TO_ONE case, so I believe the meanings are backwards from what the documentation says. Section 23.2 ("Primitive Clipping") of the Vulkan 1.0.21 specification contains the following equations: -w_c <= x_c <= w_c -w_c <= y_c <= w_c 0 <= z_c <= w_c This means that Vulkan follows D3D semantics. Cc: "12.0" <[email protected]> Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* anv/pipeline: Unify blend state setup between gen7 and gen8Jason Ekstrand2016-07-151-73/+2
| | | | | | | | | This fixes all 674 broken dEQP-VK.pipeline.blend Vulkan CTS tests on Haswell. Signed-off-by: Jason Ekstrand <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Cc: "12.0" <[email protected]>
* genxml: Make gen6-7 blending look more like gen8Jason Ekstrand2016-07-151-12/+13
| | | | | | | | | | This renames BLEND_STATE to BLEND_STATE_ENTRY and adds an new struct BLEND_STATE which is just an array of 8 BLEND_STATE_ENTRYs. This will make it much easier to write gen-agnostic blend handling code. Signed-off-by: Jason Ekstrand <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Cc: "12.0" <[email protected]>
* anv: Use different BOs for different scratch sizes and stagesJason Ekstrand2016-06-221-6/+12
| | | | | | | | | This solves a race condition where we can end up having different stages stomp on each other because they're all trying to scratch in the same BO but they have different views of its layout. Signed-off-by: Jason Ekstrand <[email protected]> Cc: "12.0" <[email protected]>
* genxml: Make ScratchSpaceBasePointer an address instead of an offsetJason Ekstrand2016-06-221-3/+15
| | | | | | | | While we're here, we also fixup MEDIA_VFE_STATE and rename the field in 3DSTATE_VS on gen6-7.5 to be consistent with the others. Signed-off-by: Jason Ekstrand <[email protected]> Cc: "12.0" <[email protected]>
* anv: Add proper support for depth clampingJason Ekstrand2016-06-201-0/+1
| | | | | | Signed-off-by: Jason Ekstrand <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Cc: "12.0" <[email protected]>
* anv/pipeline: Add support for early depth stencilJason Ekstrand2016-06-031-1/+9
| | | | | | Signed-off-by: Jason Ekstrand <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Cc: "12.0" <[email protected]>
* anv/pipeline: Silently pass tests if depth or stencil is missingJason Ekstrand2016-06-031-1/+3
| | | | | Signed-off-by: Jason Ekstrand <[email protected]> Cc: "12.0" <[email protected]>
* anv/pipeline: Unify gen7/8 emit_ds_stateJason Ekstrand2016-06-031-36/+1
| | | | | | Signed-off-by: Jason Ekstrand <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Cc: "12.0" <[email protected]>
* genxml/gen6,7,75: s/BackFace/BackfaceJason Ekstrand2016-06-031-1/+1
| | | | | | | | This is more consistent with gen8+ Signed-off-by: Jason Ekstrand <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Cc: "12.0" <[email protected]>
* i965/fs: Organize prog_data by ksp number rather than SIMD widthJason Ekstrand2016-05-141-5/+7
| | | | | | | | | | The hardware packets organize kernel pointers and GRF start by slots that don't map directly to dispatch width. This means that all of the state setup code has to re-arrange the data from prog_data into these slots. This logic has been duplicated 4 times in the GL driver and one more time in the Vulkan driver. Let's just put it all in brw_fs.cpp. Reviewed-by: Kenneth Graunke <[email protected]>
* anv: s/anv_batch_emit_blk/anv_batch_emit/Jason Ekstrand2016-04-201-14/+13
| | | | Acked-by: Kristian Høgsberg <[email protected]>
* anv/gen7_pipeline: Use the new emit macroJason Ekstrand2016-04-201-113/+124
| | | | Acked-by: Kristian Høgsberg <[email protected]>
* anv: Replace ::disable_scissor with ::use_rectlistsNanley Chery2016-04-131-1/+1
| | | | | | | | | Meta currently uses screenspace RECTLIST primitives that lie within the framebuffer rectangle. Since this behavior shouldn't change in the future, disable the scissor operation whenever rectlists are used. Signed-off-by: Nanley Chery <[email protected]> Reviewed-by: Kristian Høgsberg Kristensen <[email protected]>
* gen{7,8}_pipeline: Always set ViewportXYClipTestEnableNanley Chery2016-04-131-1/+1
| | | | | | | | | | | For the following reasons, there is no behavioural change with this commit: the ViewportXYClipTest function of the CLIP stage will continue to be enabled outside of Meta (where disable_viewport is always false), and the CLIP stage is turned off within Meta, so this function will continue to be disabled in that case. Signed-off-by: Nanley Chery <[email protected]> Reviewed-by: Kristian Høgsberg Kristensen <[email protected]>
* gen{7,8}_pipeline: Apply 3DPRIM_RECTLIST restrictionsNanley Chery2016-04-131-2/+2
| | | | | | | | | | | | | | | | | | | | | According to 3D Primitives Overview in the Bspec, when the RECTLIST primitive is in use, the CLIP stage should be disabled or set to have a different Clip Mode, and Viewport Mapping must be disabled: Clipping: Must not require clipping or rely on the CLIP unit’s ClipTest logic to determine if clipping is required. Either the CLIP unit should be DISABLED, or the CLIP unit’s Clip Mode should be set to a value other than CLIPMODE_NORMAL. Viewport Mapping must be DISABLED (as is typical with the use of screen-space coordinates). We swap out ::disable_viewport for ::use_rectlist, because we currently always use the RECTLIST primitive when we disable viewport mapping, and we'll likely continue to use this primitive. Signed-off-by: Nanley Chery <[email protected]> Reviewed-by: Kristian Høgsberg Kristensen <[email protected]>
* anv: Always use point size from the shaderKristian Høgsberg Kristensen2016-03-051-1/+1
| | | | | | | | | | | | There is no API for setting the point size and the shader is always required to set it. Section 24.4: "If the value written to PointSize is less than or equal to zero, or if no value was written to PointSize, results are undefined." As such, we can just always program PointWidthSource to Vertex. This simplifies anv_pipeline a bit and avoids trouble when we enable the pipeline cache and don't have writes_point_size in the prog_data.
* anv: Store prog data in pipeline cache streamKristian Høgsberg Kristensen2016-03-051-6/+6
| | | | | We have to keep it there for the cache to work, so let's not have an extra copy in struct anv_pipeline too.
* anv/pipeline: Fix depthBiasEnable on gen7Jason Ekstrand2016-03-041-3/+3
| | | | The first time I tried to fix this, I set the wrong fields.
* anv/pipeline: Set StencilBufferWriteEnable from the pipelineJason Ekstrand2016-03-041-0/+1
| | | | | The hardware docs say that StencilBufferWriteEnable should only be set if StencilTestEnable is set. It seems reasonable to set them together.
* anv/pipeline: Use the right provoking vertex for triangle fansJason Ekstrand2016-03-041-2/+2
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* anv/pipeline: Respect pRasterizationState->depthBiasEnableJason Ekstrand2016-03-041-0/+3
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* gen7/pipeline: Add competent blendingJason Ekstrand2016-03-011-43/+45
| | | | | This is mostly a copy-and-paste from gen8. Blending still isn't 100% but it fixes about 1100 CTS blend tests on HSW.
* anv/pipeline: Pull 3DSTATE_SBE into a shared helperJason Ekstrand2016-03-011-13/+1
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* anv/gen7: Clean up the dummy PS caseJason Ekstrand2016-02-271-19/+13
| | | | Fix whitespace and remove dead comments
* anv/gen7: Set MaximumNumberofThreads in the dummy PS packetJason Ekstrand2016-02-271-1/+5
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* anv: Switch over to the macros in genxmlJason Ekstrand2016-02-201-19/+19
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* Move the intel vulkan driver to src/intel/vulkanJason Ekstrand2016-02-181-0/+410
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