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* intel/error2aub: support older style engine namesLionel Landwerlin2019-03-081-6/+14
| | | | | Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Rafael Antognolli <[email protected]>
* intel/error2aub: deal with GuC log bufferLionel Landwerlin2019-03-081-0/+1
| | | | | | | | When Guc is enabled, the error state will contain a "global" buffer for the GuC log buffer. Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Rafael Antognolli <[email protected]>
* intel/error2aub: add a verbose optionLionel Landwerlin2019-03-081-2/+16
| | | | | Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Rafael Antognolli <[email protected]>
* intel/error2aub: write GGTT buffers into the aub fileLionel Landwerlin2019-03-083-12/+149
| | | | | Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Rafael Antognolli <[email protected]>
* intel/error2aub: store engine last ring buffer head/tail pointersLionel Landwerlin2019-03-081-0/+22
| | | | | Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Rafael Antognolli <[email protected]>
* intel/error2aub: annotate buffer with their address spaceLionel Landwerlin2019-03-081-11/+26
| | | | | Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Rafael Antognolli <[email protected]>
* intel/error2aub: parse other buffer typesLionel Landwerlin2019-03-081-13/+22
| | | | | | | We don't write them in the aub file yet. Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Rafael Antognolli <[email protected]>
* intel/error2aub: strenghten batchbuffer identifier markerLionel Landwerlin2019-03-081-2/+2
| | | | | | | | Found out that some base64 data matched the '---' identifier. We can avoid this by adding the surrounding spaces. Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Rafael Antognolli <[email protected]>
* intel/error2aub: identify buffers by engineLionel Landwerlin2019-03-081-24/+60
| | | | | Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Rafael Antognolli <[email protected]>
* intel/error2aub: build a list of BOs before writing themLionel Landwerlin2019-03-081-37/+87
| | | | | | | | | | | The error state contains several kind of BOs, including the context image which we will want to write in a later commit. Because it can come later in the error state than the user buffers and because we need to write it first in the aub file, we have to first build a list of BOs and then write them in the appropriate order. Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Rafael Antognolli <[email protected]>
* intel/aub_write: factorize context image/pphwsp/ring creationLionel Landwerlin2019-03-075-178/+161
| | | | | | | | | | | We allocate GGTT entries and physical addresses are we create engines rather than having a fixed layout. Context images now receive a parameter argument which is used to setup pml4 & ring buffer addresses. Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Rafael Antognolli <[email protected]>
* intel/aub_write: turn context images arrays into functionsLionel Landwerlin2019-03-074-242/+306
| | | | | | | | | | | We'll make them more parameterized in a later commit. As this is just a transitional commit, we allow ourself to leak the context images allocated in get_context_init(). We'll fix this in the next commit. Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Rafael Antognolli <[email protected]>
* intel/aub_write: store the physical page allocator in structLionel Landwerlin2019-03-072-15/+33
| | | | | | | We want to use this allocator in the next commit for GGTT pages. Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Rafael Antognolli <[email protected]>
* intel/aub_write: log mmio writesLionel Landwerlin2019-03-071-0/+5
| | | | | Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Rafael Antognolli <[email protected]>
* intel/aub_write: switch to use i915_drm engine classesLionel Landwerlin2019-03-074-44/+59
| | | | | | | | | Prepare aub write to deal with multiple engine instances. We don't pass the instance number yet this could be done in the future by having a 2 dimensional array of struct engine. Signed-off-by: Lionel Landwerlin <[email protected]> Acked-by: Rafael Antognolli <[email protected]>
* intel/aub_write: break execlist write in 2Lionel Landwerlin2019-03-071-41/+67
| | | | | | | | We want to reuse the execlist submission, but won't need the ring buffer update. Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Rafael Antognolli <[email protected]>
* intel/aub_write: write header in initLionel Landwerlin2019-03-074-82/+84
| | | | | Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Rafael Antognolli <[email protected]>
* intel/aub_write: split comment section from HW setupLionel Landwerlin2019-03-074-26/+52
| | | | | | | | In the future we'll want error2aub to reuse the context image saved by i915 instead of the default one we write in intel_dump_gpu. Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Rafael Antognolli <[email protected]>
* intel/aub_read: reuse defines from gen_contextLionel Landwerlin2019-03-071-12/+13
| | | | | Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Rafael Antognolli <[email protected]>
* intel/decoders: limit number of decoded batchbuffersLionel Landwerlin2019-03-072-0/+12
| | | | | | | | | | | IGT has a test to hang the GPU that works by having a batch buffer jump back into itself, trigger an infinite loop on the command stream. As our implementation of the decoding is "perfectly" mimicking the hardware, our decoder also "hangs". This change limits the number of batch buffer we'll decode before we bail to 100. Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Rafael Antognolli <[email protected]>
* intel/decoders: handle decoding MI_BBS from ringLionel Landwerlin2019-03-075-9/+9
| | | | | | | | | An MI_BATCH_BUFFER_START in the ring buffer acts as a second level batchbuffer (aka jump back to ring buffer when running into a MI_BATCH_BUFFER_END). Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Rafael Antognolli <[email protected]>
* intel/decoders: add address space indicator to get BOsLionel Landwerlin2019-03-075-26/+42
| | | | | | | Some commands like MI_BATCH_BUFFER_START have this indicator. Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Rafael Antognolli <[email protected]>
* intel/aub_viewer: silence more compiler warningsLionel Landwerlin2019-02-251-2/+2
| | | | | | | format not a string literal and no format arguments. Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Eric Engestrom <[email protected]>
* intel/aub_viewer: silence compiler warningLionel Landwerlin2019-02-251-1/+1
| | | | | | | buffer_addr may be used uninitialized. Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Eric Engestrom <[email protected]>
* intel/aub_viewer: printout 48bits addressesLionel Landwerlin2019-02-251-14/+14
| | | | | Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Eric Engestrom <[email protected]>
* imgui: make sure our copy of imgui doesn't clash with others in the same processLionel Landwerlin2019-02-211-0/+2
| | | | | | | | | | | Signed-off-by: Lionel Landwerlin <[email protected]> Acked-by: Jason Ekstrand <[email protected]> +1-by: Mike Lothian <[email protected]> +1-by: Tapani Pälli <[email protected]> +1-by: Eric Engestrom <[email protected]> +1-by: Yurii Kolesnykov <[email protected]> +1-by: myfreeweb <[email protected]> +1-by: Kenneth Graunke <[email protected]>
* build: move imgui out of src/intel/tools to be reusedLionel Landwerlin2019-02-2118-31606/+9
| | | | | | | | | | | Signed-off-by: Lionel Landwerlin <[email protected]> Acked-by: Jason Ekstrand <[email protected]> +1-by: Mike Lothian <[email protected]> +1-by: Tapani Pälli <[email protected]> +1-by: Eric Engestrom <[email protected]> +1-by: Yurii Kolesnykov <[email protected]> +1-by: myfreeweb <[email protected]> +1-by: Kenneth Graunke <[email protected]>
* drm-uapi: use local files, not system libdrmEric Engestrom2019-02-145-7/+7
| | | | | | | | | There was an issue recently caused by the system header being included by mistake, so let's just get rid of this include path and always explicitly #include "drm-uapi/FOO.h" Signed-off-by: Eric Engestrom <[email protected]> Reviewed-by: Kristian H. Kristensen <[email protected]>
* intel/dump_gpu: Disambiguate between BOs from different GEM handle spaces.Francisco Jerez2019-02-111-18/+23
| | | | | | | | | | | | | | | | This fixes a rather astonishing problem that came up while debugging an issue in the Vulkan CTS. Apparently the Vulkan CTS framework has the tendency to create multiple VkDevices, each one with a separate DRM device FD and therefore a disjoint GEM buffer object handle space. Because the intel_dump_gpu tool wasn't making any distinction between buffers from the different handle spaces, it was confusing the instruction state pools from both devices, which happened to have the exact same GEM handle and PPGTT virtual address, but completely different shader contents. This was causing the simulator to believe that the vertex pipeline was executing a fragment shader, which didn't end up well. Reviewed-by: Lionel Landwerlin <[email protected]>
* meson: remove -std=c++11 from intel/toolsDylan Baker2019-01-311-1/+1
| | | | | | | | | | | | | | | | | | | | for meson all C++ code is already compiled as C++11, so it's unnecessary. It's also the wrong way to do this, if we really needed this the correct way is to set: ```meson executable( ... override_options : ['cpp_std=c++11'], ) ``` Which ensures not only that the correct syntax for the current compiler is used, but also that meson doesn't create arguments like `-std=c++14 ... -std=c++11` Reviewed-by: Caio Marcelo de Oliveira Filho <[email protected]> Reviewed-by: Eric Engestrom <[email protected]>
* meson: fix style in intel/toolsDylan Baker2019-01-311-15/+17
| | | | | | | | | The `:` in options should always have one space before and after `foo : bar`, and lists do not get spaces around the braces: `[foo]` not `[ foo ]` Reviewed-by: Caio Marcelo de Oliveira Filho <[email protected]> Reviewed-by: Eric Engestrom <[email protected]>
* meson: remove build_by_default : trueDylan Baker2019-01-311-7/+0
| | | | | | | | | Which is and has always been the default. This is largely an artifact of how the building of these tools was controlled when the meson build was originally created. Reviewed-by: Caio Marcelo de Oliveira Filho <[email protected]> Reviewed-by: Eric Engestrom <[email protected]>
* src/intel: use new hash table and set creation helpersCaio Marcelo de Oliveira Filho2019-01-141-4/+2
| | | | | | | | | Replace calls to create hash tables and sets that use _mesa_hash_pointer/_mesa_key_pointer_equal with the helpers _mesa_pointer_hash_table_create() and _mesa_pointer_set_create(). Reviewed-by: Jason Ekstrand <[email protected]> Acked-by: Eric Engestrom <[email protected]>
* intel/aub_viewer: highlight true booleansLionel Landwerlin2018-12-283-2/+10
| | | | | | | Useful to spot PIPE_CONTROL flags. Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Tapani Pälli <[email protected]>
* intel/aub_viewer: fold binding/sampler table itemsLionel Landwerlin2018-12-281-4/+11
| | | | | | | Makes things easier to read rather than a long block of text. Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Tapani Pälli <[email protected]>
* intel/aub_viewer: fix shader viewLionel Landwerlin2018-12-281-1/+3
| | | | | | | Not decoding the shader at the right offset. Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Tapani Pälli <[email protected]>
* intel/aub_viewer: print address of missing shaderLionel Landwerlin2018-12-281-1/+2
| | | | | Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Tapani Pälli <[email protected]>
* intel/aub_viewer: fixup 0x address prefixLionel Landwerlin2018-12-281-1/+1
| | | | | Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Tapani Pälli <[email protected]>
* intel/aub_viewer: fix shader get_boLionel Landwerlin2018-12-281-6/+2
| | | | | | | Instruction addresses are always in ppgtt space. Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Tapani Pälli <[email protected]>
* intel/tools: make sure the binary file is properly readAndrii Simiklit2018-12-041-3/+13
| | | | | | | | | | | | | | | | | | | | | | | 1. tools/i965_disasm.c:58:4: warning: ignoring return value of ‘fread’, declared with attribute warn_unused_result fread(assembly, *end, 1, fp); v2: Fixed incorrect return value check. ( Eric Engestrom <[email protected]> ) v3: Zero size file check placed before fread with exit() ( Eric Engestrom <[email protected]> ) v4: - Title is changed. - The 'size' variable was moved to top of a function scope. - The assertion was replaced by the proper error handling. - The error message on a caller side was fixed. ( Eric Engestrom <[email protected]> ) Signed-off-by: Andrii Simiklit <[email protected]> Reviewed-by: Lionel Landwerlin <[email protected]> Reviewed-by: Eric Engestrom <[email protected]>
* intel/aubinator_error_decode: Get rid of warning for missing switch caseToni Lönnberg2018-12-041-0/+3
| | | | | | | | ../src/intel/tools/aubinator_error_decode.c: In function ‘instdone_register_for_ring’: ../src/intel/tools/aubinator_error_decode.c:177:4: warning: enumeration value ‘I915_ENGINE_CLASS_INVALID’ not handled in switch [-Wswitch] switch (class) { ^~~~~~ Reviewed-by: Lionel Landwerlin <[email protected]>
* intel/aub_viewer: Print blend states properlyLionel Landwerlin2018-11-161-2/+16
| | | | | | | | | | | | | Identical fix to : commit 70de31d0c106f58d6b7e6d5b79b8d90c1c112a3b Author: Jason Ekstrand <[email protected]> Date: Fri Aug 24 16:05:08 2018 -0500 intel/batch_decoder: Print blend states properly Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Toni Lönnberg <[email protected]>
* intel/aub_viewer: fix dynamic state printingLionel Landwerlin2018-11-161-2/+2
| | | | | | | | | | | | | Identical fix to : commit cbd4bc1346f7397242e157bb66099b950a8c5643 Author: Jason Ekstrand <[email protected]> Date: Fri Aug 24 16:04:03 2018 -0500 intel/batch_decoder: Fix dynamic state printing Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Toni Lönnberg <[email protected]>
* intel/aubinator: fix ring buffer pointerLionel Landwerlin2018-11-162-4/+4
| | | | | | | | | We can only start parsing commands from the head pointer. This was working fine up to now because we only dealt with a "made up" ring buffer (generated by aub_write) which always had its head at 0. Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Toni Lönnberg <[email protected]>
* intel/decoders: read ring buffer lengthLionel Landwerlin2018-11-162-2/+5
| | | | | | | Use this value to limit reading the ring buffer. Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Toni Lönnberg <[email protected]>
* intel/tools: avoid 'unused variable' warningsAndrii Simiklit2018-11-142-5/+8
| | | | | | | | | | | | | | | | | | 1. tools/aub_read.c:271:31: warning: unused variable ‘end’ const uint32_t *p = data, *end = data + data_len, *next; 2. tools/aub_mem.c:292:13: warning: unused variable ‘res’ void *res = mmap((uint8_t *)bo.map + map_offset, 4096, PROT_READ, tools/aub_mem.c:357:13: warning: unused variable ‘res’ void *res = mmap((uint8_t *)bo.map + (page - bo.addr), 4096, PROT_READ, v2: The i965_disasm.c changes was moved into a separate patch The 'end' variable declared separately with MAYBE_UNUSED to avoid effect of it to other variables. ( Eric Engestrom <[email protected]> ) Signed-off-by: Andrii Simiklit <[email protected]> Reviewed-by: Eric Engestrom <[email protected]>
* intel/decoder: tools: Use engine for decoding batch instructionsToni Lönnberg2018-11-135-41/+43
| | | | | | | | | | | | | | | | The engine to which the batch was sent to is now set to the decoder context when decoding the batch. This is needed so that we can distinguish between instructions as the render and video pipe share some of the instruction opcodes. v2: The engine is now in the decoder context and the batch decoder uses a local function for finding the instruction for an engine. v3: Spec uses engine_mask now instead of engine, replaced engine class enums with the definitions from UAPI. v4: Fix up aubinator_viewer (Lionel) Reviewed-by: Lionel Landwerlin <[email protected]>
* intel/decoder: tools: gen_engine to drm_i915_gem_engine_classToni Lönnberg2018-11-134-25/+19
| | | | | | | | | | Removed the gen_engine enum and changed the involved functions to use the drm_i915_gem_engine_class enum from UAPI instead. v3: Wrong engine was being used for blocks in video ring v4: Fixed aubinator_viewer.cpp Reviewed-by: Lionel Landwerlin <[email protected]>
* intel/aub_read: remove useless breaksLionel Landwerlin2018-11-091-6/+0
| | | | | Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Eric Engestrom <[email protected]>
* intel/dump_gpu: add platform optionLionel Landwerlin2018-11-072-6/+29
| | | | | | | Got tired of remembering the PCI ids. Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Eric Engestrom <[email protected]>
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