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* intel/eu: Split brw_inst ex_desc accessors for SEND(C) vs. SENDS(C).Francisco Jerez2019-10-111-2/+2
| | | | | | | | | | | | | | The brw_inst opcode accessors are going away in one of the following commits. We could potentially replace them with the new helpers that do opcode remapping, but that would lead to a circular dependency between brw_inst.h and brw_eu.h. This way we also avoid ordering issues that can cause the semantics of the ex_desc accessors to change depending on whether the ex_desc field is set after or before the opcode instruction field. Reviewed-by: Caio Marcelo de Oliveira Filho <[email protected]> Reviewed-by: Jordan Justen <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* intel/tools: Support multiple contexts in intel_dump_gpu.Rafael Antognolli2019-10-104-31/+62
| | | | | | | | | | | Create basic aub_context on GEM_CONTEXT_CREATE. Set it up and submit a context + ring + pphwsp during execbuf submission, if it has not been initialized yet. v2: Write the HWSP only once per engine (Lionel). Reviewed-by: Lionel Landwerlin <[email protected]>
* intel/tools: Add basic aub_context code and helpers.Rafael Antognolli2019-10-103-0/+115
| | | | | | | | | | v2: - Only dump context if there were no erros (Lionel). - Store counter for context handles in aub_file (Lionel). v3: - Add a comment about aub_context -> GEM context (Lionel). Reviewed-by: Lionel Landwerlin <[email protected]>
* intel/tools: Use common code for GGTT address allocation.Rafael Antognolli2019-10-102-20/+22
| | | | | | | We want to be able to create contexts on demand, and increase the GGTT as needed for that. Use the aub_map_ggtt() function for that. Reviewed-by: Lionel Landwerlin <[email protected]>
* intel/tools: Factor out GGTT allocation.Rafael Antognolli2019-10-101-63/+63
| | | | | | | | | We want to reuse it in execlists_setup(). v2: Rename it to write_ggtt_ptes() (Lionel). v3: Rename it to aub_map_ggtt() (Lionel). Reviewed-by: Lionel Landwerlin <[email protected]>
* intel/error2aub: add support for platforms without PPGTTLionel Landwerlin2019-10-041-15/+24
| | | | | | | | Not much to do to enable this, just make sure to always write to the GGTT :) Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* intel/tools: Fix aubinator usage of rb_tree.Rafael Antognolli2019-09-301-2/+2
| | | | | | | | | The order of comparison has changed, so we need to invert the logic of "insert_left" when using rb_tree_insert_at(). Fixes: dae33052dbf (util/rb_tree: Reverse the order of comparison functions). Reviewed-by: Jason Ekstrand <[email protected]>
* util/rb_tree: Reverse the order of comparison functionsJason Ekstrand2019-09-201-2/+2
| | | | | | | | | | | The new order matches that of the comparison functions accepted by the C standard library qsort() functions. Being consistent with qsort will hopefully help avoid developer confusion. The only current user of the red-black tree is aub_mem.c which is pretty easy to fix up. Reviewed-by: Lionel Landwerlin <[email protected]>
* intel/decoders: Avoid uninitialized variable warningsCaio Marcelo de Oliveira Filho2019-08-231-2/+2
| | | | | | | | | Initialize `next_batch_addr` and `second_level`. If the batch is well formed, those values will be overriden, if not, they are as good as uninitialized garbage. Acked-by: Eric Engestrom <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* intel/tools: Fix aub_file initialization in intel_dump_gpuCaio Marcelo de Oliveira Filho2019-08-121-0/+6
| | | | | | | | | | | | | | | | | | The `device` can be set earlier either by a command line or a by intercepting an ioctl call to get the I915_PARAM_CHIPSET_ID done by the application early. In both cases `aub_file` and `devinfo` would not be initialized. Fix by splitting the conditions - `device == 0`: use the FD to get both device and devinfo. - Or `devinfo.gen == 0`: use `device` to initialize it. And separatedly, initialize aub_file the first time it is needed. Fixes: d594d2a0524 ("intel/tools: use device info initializer") Acked-by: Jason Ekstrand <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* util: add anon_file.h for all memfd/temp file usageGreg V2019-08-071-11/+2
| | | | | | | | | Move the Weston os_create_anonymous_file code from egl/wayland into util, add support for Linux memfd and FreeBSD SHM_ANON, use that code in anv/aubinator instead of explicit memfd calls for portability. Acked-by: Lionel Landwerlin <[email protected]> Reviewed-by: Eric Engestrom <[email protected]>
* intel/tools: add binary output type to i965_asmDanylo Piliaiev2019-08-052-17/+47
| | | | | | | | Add '-t,--type' command line option to specify the output type which can be 'bin', 'c_literal' or 'hex'. Signed-off-by: Danylo Piliaiev <[email protected]> Reviewed-by: Sagar Ghuge <[email protected]>
* meson: replace libmesa_util with idep_mesautilEric Engestrom2019-08-031-13/+14
| | | | | | | | | | | This automates the include_directories and dependencies tracking so that all users of libmesa_util don't need to add them manually. Next commit will remove the ones that were only added for that reason. Signed-off-by: Eric Engestrom <[email protected]> Acked-by: Eric Anholt <[email protected]> Tested-by: Vinson Lee <[email protected]>
* intel/tools: Fix aubinator_viewer build.Kenneth Graunke2019-08-011-1/+1
| | | | | | This functions was recently renamed and not all callers were updated. Fixes: 086c486a75f ("intel/device: rename gen_get_device_info")
* intel/device: rename gen_get_device_infoMark Janes2019-08-016-7/+7
| | | | | | | | | | | | | | | | | | Rename the original device info initialization routine so callers don't mistakenly call the wrong one: gen_get_device_info_from_fd: Queries kernel for full device info, including topology details. gen_get_device_info_from_pci_id: Partially initializes device info based on PCI ID lookup, when the kernel is not available. Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Lionel Landwerlin <[email protected]>
* intel/tools: use device info initializerMark Janes2019-08-011-22/+3
| | | | | Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Lionel Landwerlin <[email protected]>
* tree-wide: replace MAYBE_UNUSED with ASSERTEDEric Engestrom2019-07-313-5/+5
| | | | | | Suggested-by: Jason Ekstrand <[email protected]> Signed-off-by: Eric Engestrom <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* intel/tools: Add assembler unit tests for ROL/ROR instructionsSagar Ghuge2019-07-015-0/+5
| | | | | Signed-off-by: Sagar Ghuge <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* intel/tools: Add ROL/ROR support in assemblerSagar Ghuge2019-07-012-0/+10
| | | | | Signed-off-by: Sagar Ghuge <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* intel/dump: fix segfault when the app hasn't accessed the deviceLionel Landwerlin2019-06-121-3/+5
| | | | | Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* intel/gpu_dump: fix argument passingLionel Landwerlin2019-06-092-3/+3
| | | | | | | | | | | We were dropping "/' around arguments grouped together. This was triggering failures with : $ ./framemetrics -g "Memory Writes Distribution Gen9" -o /tmp/output.csv -f ./my.trace 10 11 Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Jordan Justen <[email protected]> Reviewed-by: Eric Engestrom <[email protected]>
* intel/tools: use C99 print conversion specifier for 32 bit buildsMark Janes2019-06-053-4/+4
| | | | | | | | | | Fixes formatting errors for 32 bit compilations, eg: error: format ‘%lx’ expects argument of type ‘long unsigned int’, but argument 5 has type ‘uint64_t’ {aka ‘long long unsigned int’} [-Werror=format=] Reviewed-by: Lionel Landwerlin <[email protected]>
* intel/tools: Fix build with glibc < 2.27.Vinson Lee2019-05-131-0/+3
| | | | | | | | | | | | | | | | | | | | | glibc < 2.27 defines OVERFLOW in /usr/include/math.h. This patch fixes this build error. In file included from ../include/c99_math.h:37:0, from ../src/util/u_math.h:44, from ../src/mesa/main/macros.h:35, from ../src/intel/compiler/brw_reg.h:47, from ../src/intel/tools/i965_asm.h:32, from ../src/intel/tools/i965_gram.y:29: src/intel/tools/i965_gram.tab.c:562:5: error: expected identifier before numeric constant OVERFLOW = 412, ^ Fixes: 70308a5a8a80 ("intel/tools: New i965 instruction assembler tool") Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=110656 Signed-off-by: Vinson Lee <[email protected]> Acked-by: Eric Engestrom <[email protected]>
* i965_asm: avoid free()ing uninitialized pointersEric Engestrom2019-05-091-1/+1
| | | | | Signed-off-by: Eric Engestrom <[email protected]> Reviewed-by: Lionel Landwerlin <[email protected]>
* i965_asm: fix memleakEric Engestrom2019-05-091-0/+1
| | | | | Signed-off-by: Eric Engestrom <[email protected]> Reviewed-by: Lionel Landwerlin <[email protected]>
* intel/tools: Add unit tests for assemblerSagar Ghuge2019-05-07594-0/+28756
| | | | | | | | | v1: Pass executable object from meson to test(Dylan Baker) v2: Ignore generated output files from git status(Matt Turner) Signed-off-by: Sagar Ghuge <[email protected]> Reviewed-by: Matt Turner <[email protected]> Reviewed-by: Dylan Baker <[email protected]>
* intel/tools: Initialize offset correctly for i965_asmMika Kuoppala2019-05-071-10/+7
| | | | | | | | | | If we leave offset uninitialized, access to store will be random depending on stack value and can segfault. Signed-off-by: Mika Kuoppala <[email protected]> Reviewed-by: Sagar Ghuge <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* intel/tools: Add meson pthread dependancy for i965_asmMika Kuoppala2019-05-071-0/+1
| | | | | | Signed-off-by: Mika Kuoppala <[email protected]> Reviewed-by: Sagar Ghuge <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* intel/tools: New i965 instruction assembler toolSagar Ghuge2019-05-075-0/+3040
| | | | | | | | | | | | | | Tool is inspired from igt's assembler tool. Thanks to Matt Turner, who mentored me through out this project. v2: Fix memory leaks and naming convention (Caio) v3: Fix meson changes (Dylan Baker) v4: Fix usage options (Matt Turner) Signed-off-by: Sagar Ghuge <[email protected]> Reviewed-by: Dylan Baker <[email protected]> Reviewed-by: Matt Turner <[email protected]> Closes: https://gitlab.freedesktop.org/mesa/mesa/merge_requests/141
* delete autotools .gitignore filesEric Engestrom2019-04-291-2/+0
| | | | | | | | One special case, `src/util/xmlpool/.gitignore` is not entirely deleted, as `xmlpool.pot` still gets generated (eg. by `ninja xmlpool-pot`). Signed-off-by: Eric Engestrom <[email protected]> Reviewed-by: Dylan Baker <[email protected]>
* intel/tools: Remove redundant definitions of INTEL_DEBUGMark Janes2019-04-101-2/+0
| | | | | | INTEL_DEBUG is declared extern and defined in gen_debug.c Reviewed-by: Kenneth Graunke <[email protected]>
* intel/error2aub: support older style engine namesLionel Landwerlin2019-03-081-6/+14
| | | | | Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Rafael Antognolli <[email protected]>
* intel/error2aub: deal with GuC log bufferLionel Landwerlin2019-03-081-0/+1
| | | | | | | | When Guc is enabled, the error state will contain a "global" buffer for the GuC log buffer. Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Rafael Antognolli <[email protected]>
* intel/error2aub: add a verbose optionLionel Landwerlin2019-03-081-2/+16
| | | | | Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Rafael Antognolli <[email protected]>
* intel/error2aub: write GGTT buffers into the aub fileLionel Landwerlin2019-03-083-12/+149
| | | | | Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Rafael Antognolli <[email protected]>
* intel/error2aub: store engine last ring buffer head/tail pointersLionel Landwerlin2019-03-081-0/+22
| | | | | Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Rafael Antognolli <[email protected]>
* intel/error2aub: annotate buffer with their address spaceLionel Landwerlin2019-03-081-11/+26
| | | | | Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Rafael Antognolli <[email protected]>
* intel/error2aub: parse other buffer typesLionel Landwerlin2019-03-081-13/+22
| | | | | | | We don't write them in the aub file yet. Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Rafael Antognolli <[email protected]>
* intel/error2aub: strenghten batchbuffer identifier markerLionel Landwerlin2019-03-081-2/+2
| | | | | | | | Found out that some base64 data matched the '---' identifier. We can avoid this by adding the surrounding spaces. Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Rafael Antognolli <[email protected]>
* intel/error2aub: identify buffers by engineLionel Landwerlin2019-03-081-24/+60
| | | | | Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Rafael Antognolli <[email protected]>
* intel/error2aub: build a list of BOs before writing themLionel Landwerlin2019-03-081-37/+87
| | | | | | | | | | | The error state contains several kind of BOs, including the context image which we will want to write in a later commit. Because it can come later in the error state than the user buffers and because we need to write it first in the aub file, we have to first build a list of BOs and then write them in the appropriate order. Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Rafael Antognolli <[email protected]>
* intel/aub_write: factorize context image/pphwsp/ring creationLionel Landwerlin2019-03-075-178/+161
| | | | | | | | | | | We allocate GGTT entries and physical addresses are we create engines rather than having a fixed layout. Context images now receive a parameter argument which is used to setup pml4 & ring buffer addresses. Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Rafael Antognolli <[email protected]>
* intel/aub_write: turn context images arrays into functionsLionel Landwerlin2019-03-074-242/+306
| | | | | | | | | | | We'll make them more parameterized in a later commit. As this is just a transitional commit, we allow ourself to leak the context images allocated in get_context_init(). We'll fix this in the next commit. Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Rafael Antognolli <[email protected]>
* intel/aub_write: store the physical page allocator in structLionel Landwerlin2019-03-072-15/+33
| | | | | | | We want to use this allocator in the next commit for GGTT pages. Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Rafael Antognolli <[email protected]>
* intel/aub_write: log mmio writesLionel Landwerlin2019-03-071-0/+5
| | | | | Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Rafael Antognolli <[email protected]>
* intel/aub_write: switch to use i915_drm engine classesLionel Landwerlin2019-03-074-44/+59
| | | | | | | | | Prepare aub write to deal with multiple engine instances. We don't pass the instance number yet this could be done in the future by having a 2 dimensional array of struct engine. Signed-off-by: Lionel Landwerlin <[email protected]> Acked-by: Rafael Antognolli <[email protected]>
* intel/aub_write: break execlist write in 2Lionel Landwerlin2019-03-071-41/+67
| | | | | | | | We want to reuse the execlist submission, but won't need the ring buffer update. Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Rafael Antognolli <[email protected]>
* intel/aub_write: write header in initLionel Landwerlin2019-03-074-82/+84
| | | | | Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Rafael Antognolli <[email protected]>
* intel/aub_write: split comment section from HW setupLionel Landwerlin2019-03-074-26/+52
| | | | | | | | In the future we'll want error2aub to reuse the context image saved by i915 instead of the default one we write in intel_dump_gpu. Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Rafael Antognolli <[email protected]>
* intel/aub_read: reuse defines from gen_contextLionel Landwerlin2019-03-071-12/+13
| | | | | Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Rafael Antognolli <[email protected]>
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