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* intel/isl: Refactor gen7_choose_image_alignment_elJason Ekstrand2017-05-161-83/+74
| | | | | | | | | | | | | | | The Ivy Bridge PRM provides a nice table that handles most of the alignment cases in one place. For standard color buffers we have a little freedom of choice but for most depth, stencil and compressed it's hard-coded. Chad's original functions split halign and valign apart and implemented them almost entirely based on restrictions and not the table. This makes things way more confusing than they need to be. This commit gets rid of the split and makes us implement the exact table up-front. If our surface isn't one of the ones in the table then we have to make real choices. Reviewed-by: Topi Pohjolainen <[email protected]> Reviewed-by: Chad Versace <[email protected]>
* intel/isl/gen7: Use stencil vertical alignment of 8 instead of 4Pohjolainen, Topi2017-05-161-23/+5
| | | | | | | | | | | | | | | | | | | | | The reasoning Chad gave in the comment for choosing a valign of 4 is entirely bunk. The fact that you have to multiply pitch by 2 is completely unrelated to the halign/valign parameters used for texture layout. (Not completely unrelated. W-tiling is just Y-tiling with a bit of extra swizzling which turns 8x8 W-tiled chunks into 16x4 y-tiled chunks so it makes everything easier if miplevels are always aligned to 8x8.) The fact that RENDER_SURFACE_STATE::SurfaceVerticalAlignmet doesn't have a VALIGN_8 option doesn't matter since this is gen7 and you can't do stencil texturing anyway. v2 (Jason Ekstrand): - Delete most of Chad's comment and add a more descriptive commit message. Signed-off-by: Topi Pohjolainen <[email protected]> Cc: "17.0 17.1" <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]> Reviewed-by: Chad Versace <[email protected]>
* isl: Only allow Y-tiling for ASTC texturesNanley Chery2016-11-031-0/+6
| | | | | Signed-off-by: Nanley Chery <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* isl/gen7: remove unneeded ISL_DEV_GEN checkEmil Velikov2016-10-141-3/+3
| | | | | | | | | | | | The function gen7_format_needs_valign2 has two callers - the gen7 only gen7_choose_valign_el() and isl_gen6_filter_tiling(). The latter of which already guarding the invocation appropriately. To be extra cautious add a couple of asserts alongside the removal of the runtime check. Signed-off-by: Emil Velikov <[email protected]> Reviewed-by: Chad Versace <[email protected]>
* isl: prefix non-static API with isl_Emil Velikov2016-10-141-13/+13
| | | | | | | | The rest of ISL already follows this approach. Be consistent and resolve the final references. Signed-off-by: Emil Velikov <[email protected]> Reviewed-by: Chad Versace <[email protected]>
* intel/isl: Remove tiling checks from choose_msaa_layoutJason Ekstrand2016-10-031-3/+7
| | | | | | | | | | | We already do those checks in filter_tiling. There's no good reason to repeat them in choose_msaa_layout. If anything they should have been asserts and not "return false" checks. Also, this check was causing us to outright reject multisampled HiZ surfaces which wasn't intended. Signed-off-by: Jason Ekstrand <[email protected]> Reviewed-by: Chad Versace <[email protected]> Reviewed-by: Nanley Chery <[email protected]>
* intel/isl: Handle HiZ and CCS tiling more directlyJason Ekstrand2016-10-031-14/+0
| | | | | | | | | | | | The HiZ and CCS tiling formats are always used for HiZ and CCS surfaces respectively. There's no reason why we should go through filter_tiling and it's much easier to always get HiZ and CCS right if we just handle them directly. Signed-off-by: Jason Ekstrand <[email protected]> Reviewed-by: Topi Pohjolainen <[email protected]> Reviewed-by: Chad Versace <[email protected]> Reviewed-by: Nanley Chery <[email protected]>
* intel/isl: Add a format_supports_multisampling helperJason Ekstrand2016-10-031-15/+1
| | | | | | Signed-off-by: Jason Ekstrand <[email protected]> Reviewed-by: Chad Versace <[email protected]> Reviewed-by: Nanley Chery <[email protected]>
* isl: Finish tiling filtering for Gen6.Kenneth Graunke2016-09-151-1/+11
| | | | | | | | | | | | | Gen6 only has one additional restriction over Gen7+, so we just add it to the existing gen7 function (which actually covers later gens too). This should stop FINISHME spew when running GL on Sandybridge. v2: Fix bytes per block vs. bits per block confusion (Jason) and rename function to gen6_filter_tiling (Jason and Chad). Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* intel/isl: Allow valign2 for texture-only Y-tiled surfaces on gen7Jason Ekstrand2016-09-121-1/+2
| | | | | | | | | | The restriction that Y-tiled surfaces must have valign == 4 only aplies to render targets but we were applying it universally. This causes problems if ISL_FORMAT_R32G32B32_FLOAT is used because it requires valign == 2; this should be okay because you can't render to that format. Signed-off-by: Jason Ekstrand <[email protected]> Reviewed-by: Chad Versace <[email protected]>
* intel/isl: Pass the dim_layout into choose_alignment_elJason Ekstrand2016-08-251-0/+1
| | | | | | Signed-off-by: Jason Ekstrand <[email protected]> Reviewed-by: Topi Pohjolainen <[email protected]> Reviewed-by: Chad Versace <[email protected]>
* isl: Add support for color control surfacesJason Ekstrand2016-07-131-0/+7
| | | | Reviewed-by: Chad Versace <[email protected]>
* isl: Add support for multisample compression surfacesJason Ekstrand2016-07-131-0/+4
| | | | Reviewed-by: Chad Versace <[email protected]>
* isl: Add support for HiZ surfacesJason Ekstrand2016-07-131-1/+12
| | | | Reviewed-by: Chad Versace <[email protected]>
* isl: Use bpb in a few places where it's more natural than bsJason Ekstrand2016-07-131-1/+1
| | | | Reviewed-by: Chad Versace <[email protected]>
* isl: fix warnings in release buildGrazvydas Ignotas2016-04-251-1/+1
| | | | | | | | | Mark variables MAYBE_UNUSED to avoid unused-but-set-variable warnings in release build. Signed-off-by: Grazvydas Ignotas <[email protected]> Reviewed-by: Chad Versace <[email protected]> Reviewed-by: Emil Velikov <[email protected]>
* Move isl to src/intelJason Ekstrand2016-02-181-0/+395