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* intel: genxml: add RING_BUFFER_CTL registersLionel Landwerlin2017-04-045-0/+272
| | | | | Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* intel: genxml: add FAULT_REG registerLionel Landwerlin2017-04-045-0/+206
| | | | | Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* intel: genxml: add gen7 ERR_INT registerLionel Landwerlin2017-04-042-0/+22
| | | | | | | v2: add register to gen7.5 (Matt) Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* intel: genxml: add ACTHD registersLionel Landwerlin2017-04-042-0/+32
| | | | | Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* intel: genxml: add GFX_ARB_ERROR_RPT registerLionel Landwerlin2017-04-045-0/+73
| | | | | Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* intel: genxml: add INSTDONE registersLionel Landwerlin2017-04-045-0/+387
| | | | | Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* intel: genxml: compress all gen files into oneLionel Landwerlin2017-03-312-6/+30
| | | | | | | | | | | | | Combining all the files into a single string didn't make any difference in the size of the aubinator binary. With this change we now also embed gen4/4.5/5 descriptions, which increases the aubinator size by ~16Kb. v2 (Lionel): rebase makefiles Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Jordan Justen <[email protected]>
* genxml: New generated header genX_bits.h (v6)Chad Versace2017-03-282-0/+282
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | genX_bits.h contains the sizes of bitfields in genxml instructions, structures, and registers. It also defines some functions to query those sizes. isl_surf_init() will use the new header to validate that requested pitches fit in their destination bitfields. What's currently in genX_bits.h: - Each CONTAINER::Field from gen*.xml that has a bitsize has a macro in genX_bits.h: #define GEN{N}_CONTAINER_Field_bits {bitsize} - For each set of macros whose name, after stripping the GEN prefix, is the same, genX_bits.h contains a query function: static inline uint32_t __attribute__((pure)) CONTAINER_Field_bits(const struct gen_device_info *devinfo); v2 (Chad Versace): - Parse the XML instead of scraping the generated gen*_pack.h headers. v3 (Dylan Baker): - Port to Mako. v4 (Jason Ekstrand): - Make the _bits functions take a gen_device_info. v5 (Chad Versace): - Fix autotools out-of-tree build. - Fix Android build. Tested with git://github.com/android-ia/manifest. - Fix macro names. They were all missing the "_bits" suffix. - Fix macros names more. Remove all double-underscores. - Unindent all generated code. (It was floating in a sea of whitespace). - Reformat header to appear human-written not machine-generated. - Sort gens from high to low. Newest gens should come first because, when we read code, we likely want to read the gen8/9 code and ignore the gen4 code. So put the gen4 code at the bottom. - Replace 'const' attributes with 'pure', because the functions now have a pointer parameter. - Add --cpp-guard flag. Used by Android. - Kill class FieldCollection. After Jason's rewrite, it was just a dict. v6 (Chad Versace): - Replace `key not in d.keys()` with `key not in d`. [for dylan] Co-authored-by: Dylan Baker <[email protected]> Co-authored-by: Jason Ekstrand <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]> (v5) Reviewed-by: Dylan Baker <[email protected]> (v6)
* genxml: Add 3DSTATE_DEPTH_BUFFER to gen5.xmlChad Versace2017-03-241-0/+56
| | | | | | isl will use this for validating the depth buffer pitch. Reviewed-by: Jason Ekstrand <[email protected]>
* genxml: Whitespace fixesJason Ekstrand2017-03-245-39/+39
| | | | | | | Some field names had extra spaces and some had places where we should have had a space but didn't. Reviewed-by: Chad Versace <[email protected]>
* genxml: Replace "[N]" with "N"Jason Ekstrand2017-03-243-15/+15
| | | | Reviewed-by: Chad Versace <[email protected]>
* genxml/gen6: Remove a couple of bogus valuesJason Ekstrand2017-03-241-6/+2
| | | | Reviewed-by: Chad Versace <[email protected]>
* genxml/gen8: Remove BLACK_LEVEL_CORRECTION_STATEJason Ekstrand2017-03-241-6/+0
| | | | | | | We've never used it, it only exists on gen8, and the name of the struct contains piles of bad characters. Reviewed-by: Chad Versace <[email protected]>
* genxml: Rename two MCS fields to Auxiliary Surface on gen7Jason Ekstrand2017-03-242-4/+4
| | | | | | This makes gen7 more consistent with gen8+ Reviewed-by: Chad Versace <[email protected]>
* genxml: Make MI_STORE_DATA_IMM have a single 64-bit data fieldJason Ekstrand2017-03-175-10/+5
| | | | | | This is way more convenient than having two separate dword fields. Reviewed-By: Lionel Landwerlin <[email protected]>
* genxml: s/Clipper Statistics Enable/Statistics Enable/Jason Ekstrand2017-03-175-5/+5
| | | | | | | It's in 3DSTATE_CLIP, so it doesn't really need the extra detail. This matches what we do for VS, FS, etc. Reviewed-by: Lionel Landwerlin <[email protected]>
* genxml: Add pipeline statistics registers on gen7+Jason Ekstrand2017-03-174-0/+176
| | | | Reviewed-By: Lionel Landwerlin <[email protected]>
* genxml: Add XML version tagsJason Ekstrand2017-03-168-0/+8
| | | | | | | There's not much point to having them or not having them but this reduces some pointless diff from the version we can auto-generate Reviewed-by: Lionel Landwerlin <[email protected]>
* intel: genxml: prevent missing ; with address fields dwordsLionel Landwerlin2017-03-131-28/+26
| | | | | | | | | | | | | | | | Before this change, the generator could print this kind of things : const uint32_t v0 = __gen_uint(values->ValidBit, 0, 0) | __gen_uint(values->FaultType, 1, 2) | __gen_uint(values->SRCIDofFault, 3, 10) | __gen_uint(values->GTTSEL, 11, 1) | dw[0] = __gen_combine_address(data, &dw[0], values->VirtualAddressofFault, v0); This change fix the trailing '|'. Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* intel: genxml: add script to generate gzipped genxmlLionel Landwerlin2017-03-131-0/+47
| | | | | | | | | | | | | v2 (from Dylan): Add main function Add missing Copyright Use print_function v3: Add actually license (Dylan) Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Dylan Baker <[email protected]> Reviewed-by: Emil Velikov <[email protected]>
* genxml: remove shebang from gen_pack_header.pyEmil Velikov2017-03-101-1/+0
| | | | | | | Analogous to earlier commit(s). Signed-off-by: Emil Velikov <[email protected]> Reviewed-by: Eric Engestrom <[email protected]>
* genxml: Fill out Gen4 and G45 XML.Kenneth Graunke2017-03-032-1/+2232
| | | | | | | | This is a work in progress - some things may still need fixing. But it should be in pretty decent shape. Signed-off-by: Kenneth Graunke <[email protected]> Signed-off-by: Jason Ekstrand <[email protected]>
* genxml: Make MI_STORE_DATA_IMM more consistentJason Ekstrand2017-02-213-3/+3
| | | | | Reviewed-by: Lionel Landwerlin <[email protected]> Cc: "13.0 17.0" <[email protected]>
* genxml: Add the CACHE_MODE_0 register on gen9Jason Ekstrand2017-02-141-0/+28
| | | | Reviewed-by: Lionel Landwerlin <[email protected]>
* genxml: Add the CACHE_MODE_1 register on gen8Jason Ekstrand2017-02-141-0/+21
| | | | Reviewed-by: Lionel Landwerlin <[email protected]>
* genxml: Rename 3DSTATE_HS::Enable to "Function Enable".Kenneth Graunke2017-01-104-4/+4
| | | | | | | "Function Enable" is what the other stages use. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* genxml: Make Gen8 3DSTATE_DS SIMD8 enable work like Gen9+.Kenneth Graunke2016-12-141-1/+4
| | | | | | | This will let us avoid ifdefs. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Lionel Landwerlin <[email protected]>
* genxml: Rename "DS Function Enable" to "Function Enable".Kenneth Graunke2016-12-142-2/+2
| | | | | | | This makes Gen7/7.5 match Gen8-9. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Lionel Landwerlin <[email protected]>
* genxml/gen9: Change the default of MI_SEMAPHORE_WAIT::RegisterPoleModeJason Ekstrand2016-12-061-1/+1
| | | | | | | | | | We would really like it to be false as that's what you get on hardware that doesn't have RegisterPoleMode (Sky Lake for example). While we're at it, we change it to a boolean. This fixes dEQP-VK.synchronization.smoke.events on Broxton. Reviewed-by: Kenneth Graunke <[email protected]> Cc: "13.0" <[email protected]>
* intel/genxml: Fix ksp for INTERFACE_DESCRIPTOR_DATAKristian H. Kristensen2016-11-292-4/+2
| | | | | | | | | | This one was split across two dwords as "Kernel Start Pointer" and "Kernel Start Pointer High", which looks like it works when the driver only accesses "Kernel Start Pointer". This breaks, of course, with BO offsets > 4G. Signed-off-by: Kristian H. Kristensen <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* intel/genxml: Use enum 3D_Logic_Op_Function where applicableKristian H. Kristensen2016-11-295-56/+62
| | | | | Signed-off-by: Kristian H. Kristensen <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* intel/genxml: Use blend function and factor enums where applicableKristian H. Kristensen2016-11-295-130/+124
| | | | | Signed-off-by: Kristian H. Kristensen <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* intel/genxml: Use enum 3D_Vertex_Component_Control where applicableKristian H. Kristensen2016-11-295-20/+20
| | | | | Signed-off-by: Kristian H. Kristensen <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* intel/genxml: Use enum 3D_Stencil_Operation where applicableKristian H. Kristensen2016-11-295-84/+63
| | | | | Signed-off-by: Kristian H. Kristensen <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* intel/genxml: Use enum SURFACE_FORMAT where applicableKristian H. Kristensen2016-11-295-10/+10
| | | | | Signed-off-by: Kristian H. Kristensen <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* intel/genxml: Use enum 3D_Prim_Topo_Type where applicableKristian H. Kristensen2016-11-295-15/+15
| | | | | Signed-off-by: Kristian H. Kristensen <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* intel/genxml: Use 3D_Compare_Function for gen8+ test functionsKristian H. Kristensen2016-11-292-8/+8
| | | | | | | | | When the state fields where shuffled around for gen8, the compare function enums were downgraded to just uints. Change them to enum 3D_Compare_Function. Signed-off-by: Kristian H. Kristensen <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* intel/genxml: Emit genxml enums as C enumsKristian H. Kristensen2016-11-291-4/+4
| | | | | | | | | The previous commits got rid of any clashes between #defines and enum values and we can now emit the genxml enums as debugger friendly C enums. Signed-off-by: Kristian H. Kristensen <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* intel/genxml: Remove duplicate COMPAREFUNCTION valuesKristian H. Kristensen2016-11-293-120/+12
| | | | | | | | These values were defined both as an enum and as inline values. Remove the inline values and reference the 3D_Compare_Function enum instead. Signed-off-by: Kristian H. Kristensen <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* intel/genxml: Allow referencing enums in type attributesKristian H. Kristensen2016-11-291-0/+7
| | | | | | | This lets us reference enums in the type attribute of a field. Signed-off-by: Kristian H. Kristensen <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* intel/genxml: Move enums above structsKristian H. Kristensen2016-11-295-1726/+1726
| | | | | | | | | We'll need to define them before we can reference them in structs and instructions. Enums have no dependencies, so move them first in the file. Signed-off-by: Kristian H. Kristensen <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* genxml: Add values for Barycentric Interpolation ModeKristian H. Kristensen2016-11-295-5/+40
| | | | | Signed-off-by: Kristian H. Kristensen <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* intel/genxml: Add SO_WRITE_OFFSET registers for gen7-9Jason Ekstrand2016-11-164-0/+64
| | | | | Signed-off-by: Jason Ekstrand <[email protected]> Reviewed-by: Topi Pohjolainen <[email protected]>
* intel/genxml: Make 3DSTATE_WM more consistent across gensJason Ekstrand2016-11-165-15/+45
| | | | | Reviewed-by: Kristian H. Kristensen <[email protected]> Reviewed-by: Timothy Arceri <[email protected]>
* intel/genxml: Make some 3DSTATE_PS fields more consistentJason Ekstrand2016-11-163-9/+9
| | | | | Reviewed-by: Timothy Arceri <[email protected]> Reviewed-by: Kristian H. Kristensen <[email protected]>
* intel/genxml: Make some 3DSTATE_GS fields more consistentJason Ekstrand2016-11-165-10/+10
| | | | | Reviewed-by: Timothy Arceri <[email protected]> Reviewed-by: Kristian H. Kristensen <[email protected]>
* intel/genxml: Make some VS/GS fields consistent across gensJason Ekstrand2016-11-163-9/+9
| | | | | | | We use the names from gen8+ Reviewed-by: Timothy Arceri <[email protected]> Reviewed-by: Kristian H. Kristensen <[email protected]>
* intel: genxml: add SAMPLER_BORDER_COLOR_STATE structuresLionel Landwerlin2016-10-185-0/+90
| | | | | Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* anv/cmd_buffer: Unify flush_compute_state across gensJason Ekstrand2016-10-172-2/+2
| | | | | | | | | With one small genxml change, the two versions were basically identical. The only differences were one #define for HSW+ and a field that is missing on Haswell but exists everywhere else. Signed-off-by: Jason Ekstrand <[email protected]> Reviewed-by: Anuj Phogat <[email protected]>
* intel/genxml: Make some PIPE_CONTROL fields booleansJason Ekstrand2016-10-155-26/+11
| | | | | Signed-off-by: Jason Ekstrand <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
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