| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | genxml: Add missing INSTDONE_1 bits on Gen7.5+. | Kenneth Graunke | 2018-01-09 | 1 | -0/+2 |
| * | intel/genxml: Add Cache Mode SubSlice Register to gen10.xml | Anuj Phogat | 2017-11-14 | 1 | -0/+12 |
| * | intel/genxml: Fix gen10 BLEND_STATE variable length packing | Scott D Phillips | 2017-08-15 | 1 | -2/+2 |
| * | intel: genxml: make a couple of enums show up in aubinator | Lionel Landwerlin | 2017-07-02 | 1 | -7/+7 |
| * | intel/genxml: Add Gen10 CACHE_MODE_1 definitions | Anuj Phogat | 2017-06-22 | 1 | -0/+18 |
| * | intel/genxml: Rename StartInstanceLocation to StartingInstanceLocation | Anuj Phogat | 2017-06-22 | 1 | -1/+1 |
| * | intel/genxml: Rename IndirectStatePointer to BorderColorPointer | Anuj Phogat | 2017-06-22 | 1 | -1/+1 |
| * | intel/genxml: Combine DataDWord{0, 1} fields in to ImmediateData field | Anuj Phogat | 2017-06-22 | 1 | -2/+1 |
| * | intel/genxml: Add INSTDONE registers in gen10 | Anuj Phogat | 2017-06-22 | 1 | -0/+115 |
| * | intel/genxml: Add better support for MI_MATH in gen10 | Anuj Phogat | 2017-06-22 | 1 | -4/+65 |
| * | i965/genxml: Add gen10.xml | Jason Ekstrand | 2017-06-09 | 1 | -0/+3562 |
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