summaryrefslogtreecommitdiffstats
path: root/src/intel/genxml/gen10.xml
Commit message (Expand)AuthorAgeFilesLines
* intel/genxml: Add Cache Mode SubSlice Register to gen10.xmlAnuj Phogat2017-11-141-0/+12
* intel/genxml: Fix gen10 BLEND_STATE variable length packingScott D Phillips2017-08-151-2/+2
* intel: genxml: make a couple of enums show up in aubinatorLionel Landwerlin2017-07-021-7/+7
* intel/genxml: Add Gen10 CACHE_MODE_1 definitionsAnuj Phogat2017-06-221-0/+18
* intel/genxml: Rename StartInstanceLocation to StartingInstanceLocationAnuj Phogat2017-06-221-1/+1
* intel/genxml: Rename IndirectStatePointer to BorderColorPointerAnuj Phogat2017-06-221-1/+1
* intel/genxml: Combine DataDWord{0, 1} fields in to ImmediateData fieldAnuj Phogat2017-06-221-2/+1
* intel/genxml: Add INSTDONE registers in gen10Anuj Phogat2017-06-221-0/+115
* intel/genxml: Add better support for MI_MATH in gen10Anuj Phogat2017-06-221-4/+65
* i965/genxml: Add gen10.xmlJason Ekstrand2017-06-091-0/+3562