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* intel/compiler: Implement WaClearTDRRegBeforeEOTForNonPS.Rafael Antognolli2017-12-012-0/+19
* i965/vec4: use a temp register to compute offsets for pull loadsIago Toral Quiroga2017-11-301-1/+3
* i965/vec4: fix splitting of interleaved attributesIago Toral Quiroga2017-11-241-1/+6
* i965/fs: Check ADD/MAD with immediates in satprop unit testMatt Turner2017-11-211-1/+125
* i965/fs: Handle negating immediates on MADs when propagating saturatesMatt Turner2017-11-211-2/+8
* intel: fix disasm_info memory leaksTapani Pälli2017-11-212-2/+2
* i965: Stop including brw_cfg.h in brw_disasm_info.hJason Ekstrand2017-11-171-1/+5
* i965: Correct disasm_info usage in eu_validate testAndres Gomez2017-11-181-6/+6
* i965: Rename intel_asm_annotation -> brw_disasm_infoMatt Turner2017-11-175-5/+5
* i965: Rewrite disassembly annotation codeMatt Turner2017-11-179-150/+152
* i965: Simplify annotation_insert_error()Matt Turner2017-11-171-9/+6
* i965: Move common code out of #ifdefMatt Turner2017-11-172-9/+4
* intel: Drop mtypes.h include from brw_compiler.h.Kenneth Graunke2017-11-151-1/+0
* i965: Use nir_lower_atomics_to_ssbos and delete ABO compiler code.Kenneth Graunke2017-11-155-128/+0
* Revert "intel/fs: Use a pure vertical stride for large register strides"Matt Turner2017-11-141-13/+3
* i965/fs: Fix extract_i8/u8 to a 64-bit destinationMatt Turner2017-11-141-2/+23
* i965/fs: Split all 32->64-bit MOVs on CHV, BXT, GLKMatt Turner2017-11-141-4/+4
* intel/nir: Use the correct indirect lowering masks in link_shadersJason Ekstrand2017-11-081-6/+4
* intel/nir: Break the linking code into a helper in brw_nir.cJason Ekstrand2017-11-082-0/+36
* intel/nir: Add a helper for getting the NoIndirect maskJason Ekstrand2017-11-081-14/+19
* intel/fs/nir: Return Q types from brw_reg_type_for_bit_sizeJason Ekstrand2017-11-071-2/+2
* intel/fs/nir: Use Q immediates for load_const on gen8+Jason Ekstrand2017-11-071-3/+11
* intel/fs/nir: Setup immediates based on type in i2b and f2bJason Ekstrand2017-11-071-1/+2
* intel/reg: Add helpers for 64-bit integer immediatesJason Ekstrand2017-11-071-0/+18
* nir,intel/compiler: Use a fixed subgroup sizeJason Ekstrand2017-11-072-4/+2
* nir/lower_subgroups: Lower ballot intrinsics to the specified bit sizeJason Ekstrand2017-11-072-1/+1
* nir: Add a new subgroups lowering passJason Ekstrand2017-11-072-4/+7
* intel/fs: Don't use automatic exec size inferenceJason Ekstrand2017-11-071-3/+9
* intel/fs: Explicitly set EXECUTE_1 where neededJason Ekstrand2017-11-074-9/+15
* intel/eu: Explicitly set EXECUTE_1 where neededJason Ekstrand2017-11-071-0/+9
* intel/eu: Make automatic exec sizes a configurable optionJason Ekstrand2017-11-073-14/+29
* intel/fs: Rework zero-length URB write handlingJason Ekstrand2017-11-071-29/+31
* intel/compiler/fs: Set up subgroup invocation as a system valueJason Ekstrand2017-11-071-13/+21
* intel/cs: Push subgroup ID instead of base thread IDJason Ekstrand2017-11-076-27/+33
* intel/cs: Re-run final NIR optimizations for each SIMD sizeJason Ekstrand2017-11-071-41/+69
* intel/compiler: Move the destructor from vec4_visitor to backend_shaderJason Ekstrand2017-11-074-5/+5
* i965/fs: Get rid of the early return in brw_compile_csJason Ekstrand2017-11-071-13/+14
* intel/cs: Rework the way thread local ID is handledJason Ekstrand2017-11-075-46/+29
* intel/fs: Mark 64-bit values as being contiguousJason Ekstrand2017-11-071-1/+4
* intel/cs: Ignore runtime_check_aads_emit for CSJason Ekstrand2017-11-071-2/+1
* intel/cs: Stop setting dispatch_grf_start_regJason Ekstrand2017-11-072-3/+0
* intel/cs: Drop max_dispatch_width checks from compile_csJason Ekstrand2017-11-071-4/+8
* intel/fs: Remove min_dispatch_width from fs_visitorJason Ekstrand2017-11-073-33/+25
* intel/fs: use pull constant locations to check for first compile of a shaderJason Ekstrand2017-11-072-2/+7
* intel/fs: Retype dest to match value in read[First]InvocationJason Ekstrand2017-11-071-4/+2
* intel/fs: Uniformize the index in readInvocationJason Ekstrand2017-11-071-1/+1
* intel/fs: Protect opt_algebraic from OOB BROADCAST indicesJason Ekstrand2017-11-071-2/+11
* i965/fs/nir: Don't stomp 64-bit values to D in get_nir_srcJason Ekstrand2017-11-071-13/+24
* i965/fs/nir: Minor refactor of store_outputJason Ekstrand2017-11-071-4/+3
* i965/fs: Return a fs_reg from shuffle_64bit_data_for_32bit_writeJason Ekstrand2017-11-072-29/+12
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