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* i965/fs: unspills shoudn't use grf127 as dest since Gen8+Jose Maria Casanova Crespo2018-07-122-5/+34
* intel/ir: Uncomment definition of several unused hardware opcodes.Francisco Jerez2018-07-091-14/+14
* intel/fs: Initialize mlen for gen7 varying pull constant load messages.Francisco Jerez2018-07-092-7/+5
* intel/eu: Assert that the instruction is send-like in brw_set_desc_ex().Francisco Jerez2018-07-091-2/+3
* intel/eu: Get rid of the return value of brw_send_indirect_message().Francisco Jerez2018-07-092-20/+5
* intel/eu: Get rid of the return value of brw_send_indirect_surface_message().Francisco Jerez2018-07-091-10/+6
* intel/eu: Use descriptor constructors for dataport typed surface messages.Francisco Jerez2018-07-091-47/+35
* intel/eu: Use descriptor constructors for dataport scattered byte surface mes...Francisco Jerez2018-07-091-33/+27
* intel/eu: Use descriptor constructors for dataport untyped surface messages.Francisco Jerez2018-07-092-50/+52
* intel/eu: Provide single descriptor argument to brw_send_indirect_surface_mes...Francisco Jerez2018-07-091-29/+36
* intel/eu: Use descriptor constructors for pixel interpolator messages.Francisco Jerez2018-07-092-14/+29
* intel/eu: Use descriptor constructors for dataport write messages.Francisco Jerez2018-07-093-98/+65
* intel/eu: Use descriptor constructors for dataport read messages.Francisco Jerez2018-07-094-95/+85
* intel/eu: Use descriptor constructors for sampler messages.Francisco Jerez2018-07-094-122/+91
* intel/eu: Provide desc immediate argument up front to brw_send_indirect_messa...Francisco Jerez2018-07-094-11/+13
* TRIVIAL: intel/eu: Use a local devinfo variable in brw_shader_time_add().Francisco Jerez2018-07-091-5/+6
* intel/eu: Use brw_set_desc() along with a helper to set common descriptor con...Francisco Jerez2018-07-093-86/+68
* intel/eu: Define SET_BITS helper more easily reusable than SET_FIELD.Francisco Jerez2018-07-091-0/+7
* intel/eu: Define helper to specify the descriptor immediates of a SEND instru...Francisco Jerez2018-07-092-0/+26
* intel/eu: Add brw_inst.h helpers for the SEND(C) descriptor and extended desc...Francisco Jerez2018-07-091-0/+78
* intel/compiler: emit actual barriers for working-group level barriersIago Toral Quiroga2018-07-101-23/+2
* i965/fs: Enable store_ssbo for 8-bit types.Jose Maria Casanova Crespo2018-07-101-7/+8
* intel/compiler: relax brw_eu_validate for byte raw movsJose Maria Casanova Crespo2018-07-101-3/+5
* i965/fs: Enable conversions to 8-bit integersJose Maria Casanova Crespo2018-07-101-0/+2
* i965: Support for 8-bit base types in helper functionsJose Maria Casanova Crespo2018-07-102-1/+14
* i965/fs: Register allocator shoudn't use grf127 for sends destJose Maria Casanova Crespo2018-07-101-0/+25
* intel/compiler: grf127 can not be dest when src and dest overlap in sendJose Maria Casanova Crespo2018-07-101-0/+11
* intel/fs: use uint type for per_slot_offset at GSJose Maria Casanova Crespo2018-07-091-1/+1
* intel/compiler: remove unused functionIago Toral Quiroga2018-07-092-31/+0
* intel/compiler: Relax mixed type restriction for saturating immediatesIan Romanick2018-07-062-4/+22
* i965/vec4: Properly handle sign(-abs(x))Ian Romanick2018-07-061-1/+17
* i965/fs: Properly handle sign(-abs(x))Ian Romanick2018-07-061-3/+12
* python: Use the print functionMathieu Bridon2018-07-061-3/+5
* i965/vec4: Make the vec4_visitor::nir_emit_instr default case unreachableIan Romanick2018-07-051-2/+1
* intel/compiler: More DCE after loweringIan Romanick2018-07-051-0/+2
* i965: Fix output register sizes when variable ranges are interleavedNeil Roberts2018-07-041-7/+18
* i965/vec4: Don't cmod propagate from CMP to ADD if the writemask isn't compat...Ian Romanick2018-07-022-5/+87
* intel/compiler: Silence unused parameter warnings brw_nir.cIan Romanick2018-07-025-7/+6
* anv,intel: Enable nir_opt_large_constants for VulkanJason Ekstrand2018-07-022-0/+13
* intel/fs: Build 32-wide FS shaders.Francisco Jerez2018-06-281-11/+43
* intel/fs: Add fields to wm_prog_data for SIMD32 dispatchJason Ekstrand2018-06-282-0/+8
* intel/fs: Fix nir_intrinsic_load_helper_invocation for SIMD32.Francisco Jerez2018-06-281-5/+9
* intel/fs: Fix fs_builder::sample_mask_reg() for 32-wide FS dispatch.Francisco Jerez2018-06-281-3/+3
* intel/fs: Fix Gen6+ interpolation setup for SIMD32Francisco Jerez2018-06-281-56/+60
* intel/fs: Get rid of MOV_DISPATCH_TO_FLAGSJason Ekstrand2018-06-285-35/+8
* intel/fs: Emit MOV_DISPATCH_TO_FLAGS once for the centroid workaroundJason Ekstrand2018-06-282-50/+16
* intel/fs: Generalize the unlit centroid workaroundFrancisco Jerez2018-06-281-14/+8
* intel/fs: Fix sample id setup for SIMD32.Francisco Jerez2018-06-281-9/+25
* intel/fs: Fix Gen7 compressed source region alignment restriction for SIMD32Francisco Jerez2018-06-281-1/+7
* intel/fs: Implement 32-wide FS payload setup on Gen6+Francisco Jerez2018-06-281-67/+57
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