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* delete autotools .gitignore filesEric Engestrom2019-04-291-10/+0
* intel/fs: Don't emit empty ELSE blocks.Kenneth Graunke2019-04-281-4/+4
* intel/fs: Don't handle texop_tex for shaders without implicit LODCaio Marcelo de Oliveira Filho2019-04-252-6/+2
* intel/compiler/fs/icl: Use dummy masked urb write for tess evalTopi Pohjolainen2019-04-251-1/+50
* Revert "intel/compiler: split is_partial_write() into two variants"Juan A. Suarez Romero2019-04-2511-54/+30
* intel/compiler: fix uninit non-static variable. (v2)Dave Airlie2019-04-251-0/+3
* intel/fs: Fix D to W conversion in opt_combine_constantsIan Romanick2019-04-231-1/+1
* intel/compiler: Lower ffma on Gen4 and Gen5Ian Romanick2019-04-231-0/+4
* intel/compiler: Don't have sepearate, per-Gen nir_optionsIan Romanick2019-04-231-31/+11
* intel/compiler: Improve fix_3src_operand()Matt Turner2019-04-221-5/+18
* intel/compiler: Add unit tests for sat prop for different exec sizesMatt Turner2019-04-221-0/+68
* intel/compiler: Use SIMD16 instructions in fs saturate prop unit testMatt Turner2019-04-221-59/+59
* intel/fs: Remove fs_generator::generate_linterp from gen11+.Rafael Antognolli2019-04-221-44/+6
* intel/fs: Add a lowering pass for linear interpolation.Rafael Antognolli2019-04-222-0/+47
* intel/fs: Move the scalar-region conversion to the generator.Rafael Antognolli2019-04-224-5/+5
* intel/fs: Only propagate saturation if exec_size is the same.Rafael Antognolli2019-04-221-1/+2
* intel/fs: Add support for float16 to the fsign optimizationsIan Romanick2019-04-201-6/+24
* anv: Use bindless handles for imagesJason Ekstrand2019-04-191-0/+2
* intel/fs: Add support for bindless image load/store/atomicJason Ekstrand2019-04-193-8/+72
* intel/fs: Add support for bindless texture opsJason Ekstrand2019-04-195-10/+86
* intel,nir: Lower TXD with a bindless samplerJason Ekstrand2019-04-191-0/+1
* anv: Implement VK_KHR_shader_atomic_int64Jason Ekstrand2019-04-194-3/+30
* intel/nir: Re-run int64 lowering in postprocess_nirJason Ekstrand2019-04-191-0/+1
* intel/fs: Account for live range lengths in spill costsJason Ekstrand2019-04-181-1/+13
* intel/fs: Generate better code for fsign multiplied by a valueIan Romanick2019-04-181-0/+43
* intel/fs: Add a scale factor to emit_fsignIan Romanick2019-04-182-12/+77
* intel/fs: Refactor code generation for nir_op_fsign to its own functionIan Romanick2019-04-182-65/+65
* intel/fs: Eliminate dead code firstIan Romanick2019-04-181-0/+8
* nir: Add a nir_src_as_intrinsic() helperJason Ekstrand2019-04-181-11/+4
* nir: Rework nir_src_as_alu_instr to not take a pointerJason Ekstrand2019-04-181-6/+4
* intel/compiler: validate region restrictions for mixed float modeIago Toral Quiroga2019-04-182-0/+880
* intel/compiler: validate conversions between 64-bit and 8-bit typesIago Toral Quiroga2019-04-182-0/+105
* intel/compiler: validate region restrictions for half-float conversionsIago Toral Quiroga2019-04-182-1/+270
* intel/compiler: also set F execution type for mixed float mode in BDWIago Toral Quiroga2019-04-181-16/+20
* intel/compiler: implement SIMD16 restrictions for mixed-float instructionsIago Toral Quiroga2019-04-181-0/+72
* intel/compiler: skip MAD algebraic optimization for half-float or mixed modeIago Toral Quiroga2019-04-181-0/+4
* intel/compiler: remove inexact algebraic optimizations from the backendIago Toral Quiroga2019-04-181-38/+1
* intel/compiler: fix cmod propagation for non 32-bit typesIago Toral Quiroga2019-04-181-4/+9
* intel/compiler: add a brw_reg_type_is_integer helperIago Toral Quiroga2019-04-181-0/+18
* intel/compiler: implement is_zero, is_one, is_negative_one for 8-bit/16-bitIago Toral Quiroga2019-04-181-0/+26
* intel/compiler: generalize the combine constants passIago Toral Quiroga2019-04-181-22/+212
* intel/eu: force stride of 2 on NULL register for Byte instructionsIago Toral Quiroga2019-04-181-0/+11
* intel/compiler: ask for an integer type if requesting an 8-bit typeIago Toral Quiroga2019-04-181-2/+3
* intel/compiler: rework conversion opcodesIago Toral Quiroga2019-04-181-19/+22
* intel/compiler: activate 16-bit bit-size lowerings also for 8-bitIago Toral Quiroga2019-04-181-1/+1
* intel/compiler: split is_partial_write() into two variantsIago Toral Quiroga2019-04-1811-30/+54
* intel/compiler: workaround for SIMD8 half-float MAD in gen8Iago Toral Quiroga2019-04-181-11/+28
* intel/compiler: fix ddy for half-float in BroadwellIago Toral Quiroga2019-04-181-2/+15
* intel/compiler: fix ddx and ddy for 16-bit floatIago Toral Quiroga2019-04-181-19/+18
* intel/compiler: set correct precision fields for 3-source float instructionsIago Toral Quiroga2019-04-181-0/+16
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-17 19:48:38 +0000