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* anv/i965: make use of nir_link_constant_varyings()Timothy Arceri2018-11-131-0/+3
* i965: add support for sampling from AYUVLionel Landwerlin2018-11-122-0/+2
* intel/fs: Prevent emission of IR instructions not aligned to their own execut...Francisco Jerez2018-11-091-3/+17
* intel/compiler: fix node interference of simd16 instructionsIago Toral Quiroga2018-11-091-19/+17
* intel/fs: Add an assert to optimize_frontfacing_ternaryJason Ekstrand2018-11-081-0/+3
* intel/analyze_ubo_ranges: Use nir_src_is_const and friendsJason Ekstrand2018-11-081-8/+7
* intel/vec4: Use the new nir_src_is_const and friendsJason Ekstrand2018-11-083-54/+46
* intel/fs: Use the new nir_src_is_const and friendsJason Ekstrand2018-11-081-110/+87
* intel/fs,vec4: Clean up a repeated pattern with SSBOsJason Ekstrand2018-11-084-166/+85
* intel/compiler: Stop assuming the entrypoint is called "main"Jason Ekstrand2018-10-303-22/+5
* intel/nir: Use the OPT macro for more passesJason Ekstrand2018-10-261-3/+3
* nir/builder: Add a nir_imm_true/false helpersJason Ekstrand2018-10-261-1/+1
* nir/validate: Print when the validation failedJason Ekstrand2018-10-261-4/+4
* intel/compiler: Print message descriptor as immediate sourceSagar Ghuge2018-10-261-1/+7
* intel/compiler: Print hex representation along with floating point valueSagar Ghuge2018-10-261-3/+9
* util: use C99 declaration in the for-loop set_foreach() macroEric Engestrom2018-10-251-1/+0
* util: use C99 declaration in the for-loop hash_table_foreach() macroEric Engestrom2018-10-251-1/+0
* intel/compiler: Change src1 reg type to unsigned doublewordSagar Ghuge2018-10-232-3/+3
* intel/compiler/icl: Use invocation id bits 22:16 instead of 23:17Topi Pohjolainen2018-10-171-2/+6
* i965/fs: Add 64-bit int immediate support to dump_instructions()Matt Turner2018-10-162-0/+8
* intel: disable FS IR validation in release mode.Kenneth Graunke2018-10-151-0/+2
* intel/nir, freedreno/ir3: Use the separated dead write vars passCaio Marcelo de Oliveira Filho2018-10-151-0/+1
* intel/vec4: Fix nir_op_b2[fi] with 64-bit resultJason Ekstrand2018-10-111-1/+6
* intel/fs: Fix nir_op_b2[fi] with 64-bit result on Gen8 LP and Gen9 LPJason Ekstrand2018-10-111-5/+5
* intel: Introducing Whiskey Lake platformRodrigo Vivi2018-10-111-0/+1
* intel: Don't propagate conditional modifiers if a UD source is negatedJason Ekstrand2018-10-105-0/+50
* intel/compiler: Don't handle fsign.satIan Romanick2018-10-092-23/+3
* intel/fs: Fix a typo in need_matching_subreg_offsetJason Ekstrand2018-10-021-1/+1
* intel/compiler: Export TCS passthrough creationCaio Marcelo de Oliveira Filho2018-09-252-0/+86
* intel/compiler/icl: Use barrier id bits 24:30 instead of 24:27,31Topi Pohjolainen2018-09-251-3/+13
* i965/fs: Don't propagate conditional modifiers from integer compares to addsIan Romanick2018-09-171-1/+9
* Replace uses of _mesa_bitcount with util_bitcountDylan Baker2018-09-075-6/+11
* nir: Drop the vs_inputs_dual_locations optionJason Ekstrand2018-09-061-3/+0
* intel/compiler: remove unused get_image_base_type()Eric Engestrom2018-09-061-19/+0
* i965/fs: include multisamplers on image_intrinsic_coord_componentsAlejandro Piñeiro2018-09-051-0/+2
* intel/compiler: rename brw_nir_lower_glsl_imagesAlejandro Piñeiro2018-09-051-2/+2
* intel/compiler: Remove redundant nir_remove_dead_variables callJason Ekstrand2018-09-041-2/+0
* intel: compiler: remove dead local variables at optimization passLionel Landwerlin2018-09-031-0/+5
* i965/vec4: Clamp indirect tes input array reads with 0x0fffffffIan Romanick2018-09-011-1/+11
* i965/vec4: Correctly handle uniform sources in generate_tes_add_indirect_urb_...Ian Romanick2018-09-011-1/+14
* intel: Introducing Amber Lake platformRodrigo Vivi2018-08-311-0/+1
* intel/nir: Lowering image loads and stores trashes all metadataJason Ekstrand2018-08-301-2/+2
* intel/compiler: Remove surface_idx from brw_image_paramJason Ekstrand2018-08-292-13/+6
* intel: Use TXS for image_size when we have a typed surfaceJason Ekstrand2018-08-295-4/+74
* anv,i965: Lower away image derefs in the driverJason Ekstrand2018-08-295-118/+122
* nir: Use a bitfield for image access qualifiersJason Ekstrand2018-08-291-1/+1
* intel/compiler: Use two components for 1D array image sizesJason Ekstrand2018-08-291-23/+14
* intel/compiler: Do image load/store lowering to NIRJason Ekstrand2018-08-296-1120/+882
* i965/vec4: Emit BRW_AOP_INC or BRW_AOP_DEC for atomicAdd of +1 or -1Ian Romanick2018-08-281-3/+16
* i965/fs: Emit BRW_AOP_INC or BRW_AOP_DEC for imageAtomicAdd of +1 or -1Ian Romanick2018-08-281-3/+9
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