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* i965: Hide the register type hardware encodingsMatt Turner2017-08-212-31/+31
* i965: Stop using hardware register types directlyMatt Turner2017-08-214-158/+113
* i965: Add brw_hw_reg_type_to_letters() and use it in brw_disasm.cMatt Turner2017-08-213-39/+45
* i965: Move brw_reg_type_letters() as wellMatt Turner2017-08-216-33/+37
* i965: Switch to using the logical register typesMatt Turner2017-08-212-21/+19
* i965: Add functions to abstract access to register typesMatt Turner2017-08-212-51/+79
* i965: Rename brw_inst's functions that access the register typeMatt Turner2017-08-217-99/+99
* i965: Index brw_hw_reg_type_to_size()'s table by logical typeMatt Turner2017-08-211-39/+19
* i965: Add a brw_hw_type_to_reg_type() functionMatt Turner2017-08-212-0/+29
* i965: Use a common table to translate logical to hardware typesMatt Turner2017-08-211-36/+29
* i965: Extract functions dealing with register types to separate fileMatt Turner2017-08-214-140/+207
* i965: Reverse file/type arguments to register type functionsMatt Turner2017-08-214-13/+15
* i965: Add support for disassembling 64-bit integer immediatesMatt Turner2017-08-212-0/+13
* i965: Use separate enums for register vs immediate typesMatt Turner2017-08-216-129/+144
* i965: Reorder brw_reg_type enum valuesMatt Turner2017-08-215-26/+21
* i965: Validate destination restrictions with vector immediatesMatt Turner2017-08-213-12/+141
* i965: Don't let raw-move check be tricked by immediate vector typesMatt Turner2017-08-211-3/+10
* i965: Only change type of 0.0f to VF if destination stride == 1Matt Turner2017-08-211-1/+2
* i965: Remove CONT/BREAK from instruction compaction testMatt Turner2017-08-211-4/+0
* i965: Test instruction compaction on all supported GensMatt Turner2017-08-211-8/+42
* i965: Silence signed/unsigned comparison warningMatt Turner2017-08-211-1/+1
* i965: Move compaction "prepass" into brw_eu_compact.cMatt Turner2017-08-212-72/+82
* i965: Mark src inst pointer const in compaction codeMatt Turner2017-08-212-12/+13
* intel/compiler: properly size attribute wa_flags array for VulkanIago Toral Quiroga2017-08-111-1/+17
* intel/vec4/gs: reset nr_pull_param if DUAL_INSTANCED compile failed.Dave Airlie2017-08-031-0/+1
* i965: Fix indentationMatt Turner2017-08-022-8/+8
* i965: Set lower_vote_trivial in vector_nir_options_gen6 too.Kenneth Graunke2017-07-211-0/+1
* i965/fs: Match destination type to size for ballotMatt Turner2017-07-202-2/+6
* nir: Reduce destination size of ballot intrinsic when possibleMatt Turner2017-07-201-0/+1
* i965/fs: Implement ARB_shader_ballot operationsMatt Turner2017-07-203-0/+48
* i965/fs: Do not move MOVs writing the flag outside of control flowMatt Turner2017-07-201-2/+4
* i965/fs: Handle explicit flag sources in flags_read()Francisco Jerez2017-07-201-4/+5
* nir: Add system values from ARB_shader_ballotMatt Turner2017-07-202-3/+3
* i965/fs: Implement ARB_shader_group_vote operationsMatt Turner2017-07-201-0/+50
* i965/fs: Handle explicit flag destinations in flags_written()Francisco Jerez2017-07-201-4/+19
* i965/vec4: Lower ARB_shader_group_vote intrinsicsMatt Turner2017-07-201-0/+1
* nir: Add pass to optimize intrinsicsMatt Turner2017-07-201-0/+1
* i965: Use pushed UBO data in the scalar backend.Kenneth Graunke2017-07-133-1/+64
* i965: Factor out push locations.Kenneth Graunke2017-07-132-16/+25
* i965: Push UBO data, but don't use it just yet.Kenneth Graunke2017-07-132-1/+11
* i965: Select ranges of UBO data to be uploaded as push constants.Kenneth Graunke2017-07-133-0/+311
* i965: Switch to absolute addressing for constant buffer 0.Kenneth Graunke2017-07-131-0/+6
* intel/compiler: no need to check unsigned is >= 0Lionel Landwerlin2017-07-131-1/+1
* intel/compiler: don't check unsigned is >= 0Lionel Landwerlin2017-07-131-1/+1
* intel/compiler: remove check unsigned is >= 0Lionel Landwerlin2017-07-131-1/+1
* intel/compiler: Don't use opt_sampler_eot() optimization on gen10+Anuj Phogat2017-07-121-1/+1
* i965/i915: Add UYVY as the supported formatJohnson Lin2017-06-302-0/+2
* intel: compiler/i965: fix is_broxton checksLionel Landwerlin2017-06-203-4/+4
* i965/cnl: Make URB {VS, GS, HS, DS} sizes non multiple of 3Anuj Phogat2017-06-094-4/+33
* i965/cnl: Handle gen10 in switch cases across the driverAnuj Phogat2017-06-092-0/+3