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* i965: Move nir_lower_deref_instrs to right before locals_to_regsJason Ekstrand2018-06-221-0/+2
* intel,ir3: Disable nir_opt_copy_prop_varsJason Ekstrand2018-06-221-1/+1
* intel/fs: shuffle_64bit_data_for_32bit_write is not used anymoreJose Maria Casanova Crespo2018-06-162-36/+0
* intel/fs: Use new shuffle_32bit_write for all 64-bit storage writesJose Maria Casanova Crespo2018-06-161-7/+6
* intel/fs: shuffle_32bit_load_result_to_64bit_data is not used anymoreJose Maria Casanova Crespo2018-06-162-58/+0
* intel/fs: Use shuffle_from_32bit_read for 64-bit FS load_inputJose Maria Casanova Crespo2018-06-161-4/+4
* intel/fs: shuffle_from_32bit_read at load_per_vertex_input at TCS/TESJose Maria Casanova Crespo2018-06-161-14/+8
* intel/fs: Use shuffle_from_32bit_read at VS load_inputJose Maria Casanova Crespo2018-06-161-10/+5
* intel/fs: Use shuffle_from_32bit_read for 64-bit gs_input_loadJose Maria Casanova Crespo2018-06-161-5/+5
* intel/fs: shuffle_from_32bit_read for 64-bit do_untyped_vector_readJose Maria Casanova Crespo2018-06-161-10/+2
* intel/fs: Remove old 16-bit shuffle/unshuffle functionsJose Maria Casanova Crespo2018-06-162-73/+0
* intel/fs: Use shuffle_for_32bit_write for 16-bits store_ssboJose Maria Casanova Crespo2018-06-161-5/+2
* intel/fs: Use shuffle_from_32bit_read to read 16-bit SSBOJose Maria Casanova Crespo2018-06-161-4/+2
* intel/fs: Use shuffle_from_32bit_read at VARYING_PULL_CONSTANT_LOADJose Maria Casanova Crespo2018-06-161-15/+2
* intel/fs: New shuffle_for_32bit_write and shuffle_from_32bit_readJose Maria Casanova Crespo2018-06-162-0/+54
* intel/fs: general 8/16/32/64-bit shuffle_src_to_dst functionJose Maria Casanova Crespo2018-06-161-0/+101
* i965/fs: Propagate conditional modifiers from not instructionsIan Romanick2018-06-151-1/+61
* i965/fs: Rearrange code to remove most of the gotosIan Romanick2018-06-151-11/+3
* i965/fs: Refactor propagation of conditional modifiers from compares to addsIan Romanick2018-06-151-57/+80
* i965/vec4: Optimize OR with 0 into a MOVIan Romanick2018-06-151-0/+8
* i965/vec4: Don't register coalesce into source of VS_OPCODE_UNPACK_FLAGS_SIMD4X2Ian Romanick2018-06-151-0/+9
* i965/fs: Optimize OR with 0 into a MOVIan Romanick2018-06-151-1/+2
* intel/compiler: Properly consider UBO loads that cross 32B boundaries.Kenneth Graunke2018-06-141-2/+14
* Revert "intel/compiler: Properly consider UBO loads that cross 32B boundaries."Jason Ekstrand2018-06-131-7/+1
* intel/compiler: Properly consider UBO loads that cross 32B boundaries.Kenneth Graunke2018-06-131-1/+7
* intel/eu: Use a struct copy instead of a memcpyJason Ekstrand2018-06-051-1/+1
* intel/eu: Switch to a logical state stackJason Ekstrand2018-06-043-126/+72
* intel/eu: Set flag [sub]register number differently for 3srcJason Ekstrand2018-06-041-3/+10
* intel/eu: Copy fields manually in brw_next_insnJason Ekstrand2018-06-041-1/+94
* intel/eu: Add some brw_get_default_ helpersJason Ekstrand2018-06-044-55/+79
* i965: Add ARB_fragment_shader_interlock support.Plamena Manolova2018-06-017-6/+34
* intel/fs: Add explicit last_rt flag to fb writes orthogonal to eot.Francisco Jerez2018-05-294-5/+5
* intel/fs: Replace the CINTERP opcode with a simple MOVFrancisco Jerez2018-05-295-12/+3
* intel/fs: Use the ATTR file for FS inputsFrancisco Jerez2018-05-294-22/+30
* intel/fs: Rename a local variable so it doesn't shadow component()Francisco Jerez2018-05-291-4/+4
* intel/eu: Remove brw_codegen::compressed_stack.Francisco Jerez2018-05-291-1/+0
* intel/fs: Use groups for SIMD16 LINTERP on gen11+Jason Ekstrand2018-05-291-4/+5
* intel/fs: Assert that the gen4-6 plane restrictions are followedJason Ekstrand2018-05-291-2/+8
* intel/eu: Set EXECUTE_1 when setting the rounding mode in cr0Jason Ekstrand2018-05-221-0/+2
* i965/compiler: handle conversion to smaller type in the lowering pass for thatIago Toral Quiroga2018-05-052-12/+26
* intel/compiler: handle 16-bit to 64-bit conversions in BSW platformsIago Toral Quiroga2018-05-051-4/+4
* Revert "i965/compiler: handle conversion to smaller type in the lowering pass...Mark Janes2018-05-032-7/+12
* intel/compiler: implement 16-bit pack/unpack opcodesIago Toral Quiroga2018-05-031-0/+10
* compiler/lower_64bit_packing: rename the pass to be more genericIago Toral Quiroga2018-05-031-1/+1
* intel/compiler: fix 16-bit comparisonsIago Toral Quiroga2018-05-031-8/+30
* intel/compiler: lower some 16-bit integer operations to 32-bitIago Toral Quiroga2018-05-031-0/+21
* intel/compiler: support negate and abs of half float immediatesJose Maria Casanova Crespo2018-05-031-2/+4
* intel/compiler: fix brw_imm_w for negative 16-bit integersJose Maria Casanova Crespo2018-05-031-1/+1
* intel/compiler: fix 16-bit int brw_negate_immediate and brw_abs_immediateJose Maria Casanova Crespo2018-05-031-4/+8
* intel/compiler: implement nir_instr_type_load_const for 16-bit constantsJose Maria Casanova Crespo2018-05-031-0/+5
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