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* i965: Move down genX_upload_sbe in profiles.Mathias Fröhlich2020-03-104-0/+34
* intel/fs: Fix workaround for VxH indirect addressing bug under control flow.Francisco Jerez2020-03-101-10/+28
* intel/fs: Allow NOT instructions in conditional discard optimizationIan Romanick2020-03-091-1/+0
* intel/fs: Do cmod prop again after schedulingIan Romanick2020-03-091-0/+11
* intel/compiler: Discount NOPs from instruction countsMatt Turner2020-03-091-3/+9
* intel/compiler: Pass shader_stats for each SIMD modeMatt Turner2020-03-097-24/+21
* intel/compiler: Pass backend_shader * to cfg_t()Matt Turner2020-03-097-16/+20
* intel/compiler: Mark visitor parameters to scheduler constMatt Turner2020-03-091-10/+10
* intel/compiler: Mark some methods and parameters constMatt Turner2020-03-098-27/+27
* intel/compiler: Make instructions_to_schedule a local variableMatt Turner2020-03-091-4/+2
* intel/compiler: Remove unnecessary local variablesMatt Turner2020-03-091-3/+0
* intel/vec4: Make implied_mrf_writes() a vec4_instruction methodMatt Turner2020-03-094-9/+8
* intel/compiler: Calculate num_instructions in O(1) during register pressure c...Francisco Jerez2020-03-061-3/+2
* intel/compiler: Move register pressure calculation into IR analysis objectFrancisco Jerez2020-03-063-19/+47
* entel/compiler: Simplify new_idom reduction in dominance tree calculationFrancisco Jerez2020-03-061-5/+2
* intel/compiler: Move dominance tree data structure into idom_tree objectFrancisco Jerez2020-03-062-26/+47
* intel/compiler: Move idom tree calculation and related logic into analysis ob...Francisco Jerez2020-03-065-32/+59
* intel/compiler: Drop invalidate_live_intervals()Francisco Jerez2020-03-066-21/+0
* intel/compiler/vec4: Switch liveness analysis to IR analysis frameworkFrancisco Jerez2020-03-068-57/+29
* intel/compiler/fs: Switch liveness analysis to IR analysis frameworkFrancisco Jerez2020-03-0612-97/+84
* intel/compiler/vec4: Add live interval validation passFrancisco Jerez2020-03-062-0/+46
* intel/compiler/fs: Add live interval validation passFrancisco Jerez2020-03-062-0/+43
* intel/compiler: Pass single backend_shader argument to the vec4_live_variable...Francisco Jerez2020-03-062-5/+6
* intel/compiler: Pass single backend_shader argument to the fs_live_variables ...Francisco Jerez2020-03-062-11/+10
* intel/compiler: Restructure live intervals computation codeFrancisco Jerez2020-03-062-78/+54
* intel/compiler: Move all live interval analysis results into vec4_live_variablesFrancisco Jerez2020-03-067-25/+36
* intel/compiler: Move all live interval analysis results into fs_live_variablesFrancisco Jerez2020-03-069-42/+43
* intel/compiler: Mark virtual_grf_interferes and vars_interfere as constFrancisco Jerez2020-03-065-6/+6
* intel/compiler: Pass detailed dependency classes to invalidate_analysis()Francisco Jerez2020-03-0620-54/+61
* intel/compiler: Define more detailed analysis dependency classesFrancisco Jerez2020-03-061-0/+46
* intel/compiler: Introduce backend_shader method to propagate IR changes to an...Francisco Jerez2020-03-0624-52/+93
* intel/compiler: Introduce simple IR analysis pass frameworkFrancisco Jerez2020-03-062-0/+147
* intel/compiler: Reverse inclusion dependency between brw_vec4_live_variables....Francisco Jerez2020-03-064-6/+3
* intel/compiler: Reverse inclusion dependency between brw_fs_live_variables.h ...Francisco Jerez2020-03-063-3/+4
* intel/compiler: Nest definition of live variables block_data structuresFrancisco Jerez2020-03-064-82/+83
* intel/compiler: Reverse inclusion dependency between brw_cfg.h and brw_shader.hFrancisco Jerez2020-03-064-6/+6
* intel/compiler: Move base IR definitions into a separate header fileFrancisco Jerez2020-03-063-157/+184
* intel/compiler: Restrict cs_threads to 64Jordan Justen2020-02-281-1/+3
* nir, intel: Move use_scoped_memory_barrier to nir_optionsCaio Marcelo de Oliveira Filho2020-02-241-1/+2
* nir: Move intel's intrinsic_image_coordinate_components() to core nir.Eric Anholt2020-02-241-22/+1
* intel/fs: Correctly handle multiply of fsign with a source modifierIan Romanick2020-02-191-0/+10
* intel/compiler: Do not qsort zero sized arrayDanylo Piliaiev2020-02-191-2/+4
* brw_fs: Avoid zero size vlaDanylo Piliaiev2020-02-191-1/+1
* brw_nir: Cast bitshift to unsignedDanylo Piliaiev2020-02-191-1/+1
* intel/gen12: Take into account opcode when decoding SWSBCaio Marcelo de Oliveira Filho2020-02-182-3/+7
* intel/fs/gen7+: Implement discard/demote for SIMD32 programs.Francisco Jerez2020-02-142-8/+14
* intel/fs: Return consistent UW types from sample_mask_reg() in fragment shaders.Francisco Jerez2020-02-141-3/+2
* intel/fs: Refactor predication on sample mask into helper function.Francisco Jerez2020-02-141-34/+44
* intel/fs/gen7+: Swap sample mask flag register and FIND_LIVE_CHANNEL temporary.Francisco Jerez2020-02-144-13/+18
* intel/fs: Use helper for discard sample mask flag subregister number.Francisco Jerez2020-02-144-5/+16
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