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* intel/compiler: Properly consider UBO loads that cross 32B boundaries.Kenneth Graunke2018-06-141-2/+14
* Revert "intel/compiler: Properly consider UBO loads that cross 32B boundaries."Jason Ekstrand2018-06-131-7/+1
* intel/compiler: Properly consider UBO loads that cross 32B boundaries.Kenneth Graunke2018-06-131-1/+7
* intel/eu: Use a struct copy instead of a memcpyJason Ekstrand2018-06-051-1/+1
* intel/eu: Switch to a logical state stackJason Ekstrand2018-06-043-126/+72
* intel/eu: Set flag [sub]register number differently for 3srcJason Ekstrand2018-06-041-3/+10
* intel/eu: Copy fields manually in brw_next_insnJason Ekstrand2018-06-041-1/+94
* intel/eu: Add some brw_get_default_ helpersJason Ekstrand2018-06-044-55/+79
* i965: Add ARB_fragment_shader_interlock support.Plamena Manolova2018-06-017-6/+34
* intel/fs: Add explicit last_rt flag to fb writes orthogonal to eot.Francisco Jerez2018-05-294-5/+5
* intel/fs: Replace the CINTERP opcode with a simple MOVFrancisco Jerez2018-05-295-12/+3
* intel/fs: Use the ATTR file for FS inputsFrancisco Jerez2018-05-294-22/+30
* intel/fs: Rename a local variable so it doesn't shadow component()Francisco Jerez2018-05-291-4/+4
* intel/eu: Remove brw_codegen::compressed_stack.Francisco Jerez2018-05-291-1/+0
* intel/fs: Use groups for SIMD16 LINTERP on gen11+Jason Ekstrand2018-05-291-4/+5
* intel/fs: Assert that the gen4-6 plane restrictions are followedJason Ekstrand2018-05-291-2/+8
* intel/eu: Set EXECUTE_1 when setting the rounding mode in cr0Jason Ekstrand2018-05-221-0/+2
* i965/compiler: handle conversion to smaller type in the lowering pass for thatIago Toral Quiroga2018-05-052-12/+26
* intel/compiler: handle 16-bit to 64-bit conversions in BSW platformsIago Toral Quiroga2018-05-051-4/+4
* Revert "i965/compiler: handle conversion to smaller type in the lowering pass...Mark Janes2018-05-032-7/+12
* intel/compiler: implement 16-bit pack/unpack opcodesIago Toral Quiroga2018-05-031-0/+10
* compiler/lower_64bit_packing: rename the pass to be more genericIago Toral Quiroga2018-05-031-1/+1
* intel/compiler: fix 16-bit comparisonsIago Toral Quiroga2018-05-031-8/+30
* intel/compiler: lower some 16-bit integer operations to 32-bitIago Toral Quiroga2018-05-031-0/+21
* intel/compiler: support negate and abs of half float immediatesJose Maria Casanova Crespo2018-05-031-2/+4
* intel/compiler: fix brw_imm_w for negative 16-bit integersJose Maria Casanova Crespo2018-05-031-1/+1
* intel/compiler: fix 16-bit int brw_negate_immediate and brw_abs_immediateJose Maria Casanova Crespo2018-05-031-4/+8
* intel/compiler: implement nir_instr_type_load_const for 16-bit constantsJose Maria Casanova Crespo2018-05-031-0/+5
* intel/compiler: implement conversions from 16-bit int/float to boolIago Toral Quiroga2018-05-031-5/+11
* intel/compiler: implement conversion between float/int 16-bit typesIago Toral Quiroga2018-05-031-0/+4
* i965/compiler: handle conversion to smaller type in the lowering pass for thatIago Toral Quiroga2018-05-032-12/+7
* intel/compiler: fix isign for 16-bit integersIago Toral Quiroga2018-05-031-5/+12
* intel: activate the gl_BaseVertex loweringAntia Puentes2018-05-025-16/+8
* intel: emit is_indexed_draw in the same VE than gl_DrawIDAntia Puentes2018-05-023-8/+19
* intel/compiler: Add uses_is_indexed_draw flagAntia Puentes2018-05-022-0/+5
* intel/compiler: Add scheduler deps for instructions that implicitly read g0Ian Romanick2018-04-242-0/+28
* intel/compiler: Silence unused parameter warnings in empty vec4_instruction_s...Ian Romanick2018-04-241-5/+5
* intel/compiler: Silence unused parameter warning in compile_cs_to_nirIan Romanick2018-04-241-4/+3
* intel/compiler: Silence unused parameter warnings in generate_foo methodsIan Romanick2018-04-242-8/+8
* i965/fs: Return mlen * 8 for size_read() for INTERPOLATE_AT_*Jason Ekstrand2018-04-231-0/+2
* i965/fs: retype offset_reg to UD at load_ssboJose Maria Casanova Crespo2018-04-201-1/+1
* intel: Handle firstvertex in an identical way to BaseVertexAntia Puentes2018-04-193-0/+8
* intel/compiler: Add a uses_firstvertex flagNeil Roberts2018-04-192-0/+5
* mesa: include mtypes.h lessMarek Olšák2018-04-122-0/+2
* intel/compiler: Explicitly cast register type in switchIan Romanick2018-04-061-1/+1
* intel: compiler: silence compiler warningLionel Landwerlin2018-04-041-0/+1
* nir+drivers: add helpers to get # of src/dest componentsRob Clark2018-04-031-6/+5
* intel/vec4: Set channel_sizes for MOV_INDIRECT sourcesJason Ekstrand2018-03-301-1/+4
* util: Add and use util_is_power_of_two_nonzeroIan Romanick2018-03-291-2/+2
* util: Move util_is_power_of_two to bitscan.h and rename to util_is_power_of_t...Ian Romanick2018-03-291-2/+2
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