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* i965/fs: Take into account lower frequency of conditional blocks in spilling ↵Francisco Jerez2017-04-111-5/+14
| | | | | | | | | | | | | | | | | | | | cost heuristic. The individual branches of an if/else/endif construct will be executed some unknown number of times between 0 and 1 relative to the parent block. Use some factor in between as weight while approximating the cost of spill/fill instructions within a conditional if-else branch. This favors spilling registers used within conditional branches which are likely to be executed less frequently than registers used at the top level. Improves the framerate of the SynMark2 OglCSDof benchmark by ~1.9x on my SKL GT4e. Should have a comparable effect on other platforms. No significant regressions. Reviewed-by: Jason Ekstrand <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* i965/fs: Always provide a default LOD of 0 for TXS and TXLJason Ekstrand2017-04-041-9/+9
| | | | | | | | | | | | | We already provide a default LOD for textureQueryLevels and texture() on non-fragment stages. However, there are more cases where one is needed such as textureSize(gsampler2DMS*) in SPIR-V. Instead of trying to list out all of the cases one at a time, just provide the default for all TXS and TXL operations. This fixes a shader validation error in the new Sascha deferredmultisampling demo which uses textureSize(gsampler2DMS). Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=100391 Reviewed-by: Anuj Phogat <[email protected]> Cc: "13.0 17.0" <[email protected]>
* intel/vec4: Add some fall through commentsJason Ekstrand2017-04-031-0/+4
| | | | Reviewed-by: Matt Turner <[email protected]>
* i965: expose BRW_OPCODE_[F32TO16/F16TO32] name on gen8+Alejandro Piñeiro2017-03-291-0/+9
| | | | | | | | | | | | | | | | | | | | | | Technically those hw operations are only available on gen7, as gen8+ support the conversion on the MOV. But, when using the builder to implement nir operations (example: nir_op_fquantize2f16), it is not needed to do the gen check. This check is done later, on the final emission at brw_F32TO16 (brw_eu_emit), choosing between the MOV or the specific operation accordingly. So in the middle, during optimization phases those hw operations can be around for gen8+ too. Without this patch, several (at least 95) vulkan-cts quantize tests crashes when using INTEL_DEBUG=optimizer. For example: dEQP-VK.spirv_assembly.instruction.graphics.opquantize.too_small_vert v2: simplify the code using GEN_GE (Ilia Mirkin) v3: tweak brw_instruction_name instead of changing opcode_descs table, that is used for validation (Matt Turner) Reviewed-by: Matt Turner <[email protected]>
* i965/fs: Don't emit SEL instructions for type-converting MOVs.Matt Turner2017-03-271-0/+2
| | | | | | | | | | SEL can only convert between a few integer types, which we basically never do. Fixes fs/vs-double-uniform-array-direct-indirect-non-uniform-control-flow Cc: [email protected] Reviewed-by: Samuel Iglesias Gonsálvez <[email protected]> Acked-by: Francisco Jerez <[email protected]>
* anv/pipeline: make FragCoord include sample positions when sample shadingIago Toral Quiroga2017-03-241-0/+1
| | | | | | | | | | | | | | | | | | | | | | We need to know if sample shading has been requested during shader compilation since that affects the way fragment coordinates are computed. Notice that the semantics of fragment coordinates only depend on whether sample shading has been requested, not on whether more than one sample will actually be produced (that is, minSampleShading and rasterizationSamples do not affect this behavior). Because this setting affects the code we generate for the shader, we also need to include it in the WM prog key. Notice we don't need to alter the OpenGL code because it doesn't ever use this behavior, so they key's value is always false (the default). Fixes: dEQP-VK.glsl.builtin_var.fragcoord_msaa.* Reviewed-by: Jason Ekstrand <[email protected]>
* i965: Replace OPT_V() with OPT().Matt Turner2017-03-231-23/+19
| | | | | | | We want to be able to check the progress of each pass and dump the NIR for debugging purposes if it changed. Reviewed-by: Jason Ekstrand <[email protected]>
* i965/fs: Return progress from demote_sample_qualifiers().Matt Turner2017-03-231-1/+6
| | | | Reviewed-by: Jason Ekstrand <[email protected]>
* i965/fs: Return progress from move_interpolation_to_top().Matt Turner2017-03-231-1/+6
| | | | | | And mark as static at the same time. Reviewed-by: Jason Ekstrand <[email protected]>
* intel/compiler: consistently use ifndef guards over pragma onceEmil Velikov2017-03-228-5/+31
| | | | | | | | Signed-off-by: Emil Velikov <[email protected]> Acked-by: Lionel Landwerlin <[email protected]> Acked-by: Vedran Miletić <[email protected]> Acked-by: Juha-Pekka Heikkila <[email protected]> Reviewed-by: Edward O'Callaghan <[email protected]>
* i965: make brw_setup_image_uniform_values staticEmil Velikov2017-03-221-5/+0
| | | | | | | | | | Used only internally. Signed-off-by: Emil Velikov <[email protected]> Acked-by: Lionel Landwerlin <[email protected]> Acked-by: Vedran Miletić <[email protected]> Acked-by: Juha-Pekka Heikkila <[email protected]> Reviewed-by: Edward O'Callaghan <[email protected]>
* nir: Rework conversion opcodesJason Ekstrand2017-03-143-67/+45
| | | | | | | | | | | | | | | | | | | | | | | | The NIR story on conversion opcodes is a mess. We've had way too many of them, naming is inconsistent, and which ones have explicit sizes was sort-of random. This commit re-organizes things and makes them all consistent: - All non-bool conversion opcodes now have the explicit size in the destination and are named <src_type>2<dst_type><size>. - Integer <-> integer conversion opcodes now only come in i2i and u2u forms (i2u and u2i have been removed) since the only difference between the different integer conversions is whether or not they sign-extend when up-converting. - Boolean conversion opcodes all have the explicit size on the bool and are named <src_type>2<dst_type>. Making things consistent also allows nir_type_conversion_op to be moved to nir_opcodes.c and auto-generated using mako. This will make adding int8, int16, and float16 versions much easier when the time comes. Reviewed-by: Eric Anholt <[email protected]>
* i965/fs: Re-arrange conversion operationsJason Ekstrand2017-03-141-36/+31
| | | | Reviewed-by: Topi Pohjolainen <[email protected]>
* i965/vec4: Get rid of the type parameter from to/from_doubleJason Ekstrand2017-03-142-24/+15
| | | | Reviewed-by: Topi Pohjolainen <[email protected]>
* i965/fs: Use num_components from the SSA def in image intrinsicsJason Ekstrand2017-03-141-2/+1
| | | | | | Reviewed-by: Eric Anholt <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Connor Abbott <[email protected]>
* intel: fix compiler buildIago Toral Quiroga2017-03-131-0/+7
| | | | | | | | | compiler/brw_vec4_gs_visitor.cpp:744:39: error: ‘GEN7_MAX_GS_OUTPUT_VERTEX_SIZE_BYTES’ was not declared in this scope output_vertex_size_bytes <= GEN7_MAX_GS_OUTPUT_VERTEX_SIZE_BYTES); Fixes: d0d4a5f43b4 ("i965: split EU defines to brw_eu_defines.h") Reviewed-by: Emil Velikov <[email protected]>
* intel/compiler: whitespace cleanupsEmil Velikov2017-03-132-5/+0
| | | | | Signed-off-by: Emil Velikov <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* intel/compiler: link all tests again gtest, even test_eu_compact"Emil Velikov2017-03-131-1/+1
| | | | | | | | | | | | At the moment all the tests but test_eu_compact are actual C++ gtests. To simplify things, we can move the gtest.la to the common TEST_LIBS. As we're here, we can rename change the test extension [to .cpp] to avoid using the confusing dummy.cpp. Add a nice comment in the makefile for posterity. Signed-off-by: Emil Velikov <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* i965: Move the back-end compiler to src/intel/compilerJason Ekstrand2017-03-1395-0/+63683
Mostly a dummy git mv with a couple of noticable parts: - With the earlier header cleanups, nothing in src/intel depends files from src/mesa/drivers/dri/i965/ - Both Autoconf and Android builds are addressed. Thanks to Mauro and Tapani for the fixups in the latter - brw_util.[ch] is not really compiler specific, so it's moved to i965. v2: - move brw_eu_defines.h instead of brw_defines.h - remove no-longer applicable includes - add missing vulkan/ prefix in the Android build (thanks Tapani) v3: - don't list brw_defines.h in src/intel/Makefile.sources (Jason) - rebase on top of the oa patches [Emil Velikov: commit message, various small fixes througout] Signed-off-by: Emil Velikov <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>