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path: root/src/intel/compiler/brw_vec4_nir.cpp
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* i965/vec4: Properly handle sign(-abs(x))Ian Romanick2018-07-061-1/+17
* i965/vec4: Make the vec4_visitor::nir_emit_instr default case unreachableIan Romanick2018-07-051-2/+1
* i965: Combine {VS,FS}_OPCODE_GET_BUFFER_SIZE opcodes.Kenneth Graunke2017-12-301-1/+1
* i965/vec4: use a temp register to compute offsets for pull loadsIago Toral Quiroga2017-11-301-1/+3
* i965: Use nir_lower_atomics_to_ssbos and delete ABO compiler code.Kenneth Graunke2017-11-151-46/+0
* i965/vec4: remove setting default LOD in the backendSamuel Iglesias Gonsálvez2017-10-201-9/+0
* intel: compiler: vec4: add missing default 0 lodLionel Landwerlin2017-10-031-0/+9
* i965/vec4: Actually handle atomic op intrinsics.Kenneth Graunke2017-09-261-2/+10
* i965: Mark functions staticMatt Turner2017-08-211-2/+3
* i965/vec4: fix swizzle and writemask when loading an uniform with constant of...Samuel Iglesias Gonsálvez2017-05-181-4/+11
* i965/vec4: Delete the system value infastructureJason Ekstrand2017-05-091-38/+0
* i965/vec4: Use NIR remapping for VS attributesJason Ekstrand2017-05-091-47/+2
* nir: Embed the shader_info in the nir_shader againJason Ekstrand2017-05-091-4/+4
* i965/vec4: use vec4_builder to emit instructions in setup_imm_df()Samuel Iglesias Gonsálvez2017-04-141-48/+49
* i965/vec4: split VEC4_OPCODE_FROM_DOUBLE into one opcode per destination's typeSamuel Iglesias Gonsálvez2017-04-141-6/+18
* i965/vec4: split d2x conversion and data gathering from one opcode to two exp...Samuel Iglesias Gonsálvez2017-04-141-0/+1
* intel/vec4: Add some fall through commentsJason Ekstrand2017-04-031-0/+4
* nir: Rework conversion opcodesJason Ekstrand2017-03-141-38/+29
* i965/vec4: Get rid of the type parameter from to/from_doubleJason Ekstrand2017-03-141-20/+13
* i965: Move the back-end compiler to src/intel/compilerJason Ekstrand2017-03-131-0/+2407
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