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path: root/src/intel/compiler/brw_schedule_instructions.cpp
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* intel/compiler: Re-prefix non-logical surface opcodes with VEC4Jason Ekstrand2019-02-281-3/+3
* intel/schedule_instructions: Move some commentsJason Ekstrand2019-02-281-37/+37
* intel/compiler: Drop unused surface opcodesJason Ekstrand2019-02-281-4/+0
* intel/fs: Implement nir_intrinsic_global_atomic_*Jason Ekstrand2019-02-011-0/+2
* intel/fs: Implement load/store_global with A64 untyped messagesJason Ekstrand2019-02-011-0/+4
* intel/fs: Use SHADER_OPCODE_SEND for varying UBO pulls on gen7+Jason Ekstrand2019-01-291-1/+0
* intel/fs: Use SHADER_OPCODE_SEND for texturing on gen7+Jason Ekstrand2019-01-291-0/+17
* intel/fs: Use SHADER_OPCODE_SEND for surface messagesJason Ekstrand2019-01-291-0/+72
* intel/fs: Add a generic SEND opcodeJason Ekstrand2019-01-291-0/+7
* intel/compiler: Heap-allocate temporary storageMatt Turner2019-01-091-3/+5
* intel/compiler: Prevent warnings in the following patchMatt Turner2019-01-091-3/+3
* intel/compiler: Implement untyped atomic float min, max, and compare-swap dat...Ian Romanick2018-08-221-0/+1
* intel/compiler: Add scheduler deps for instructions that implicitly read g0Ian Romanick2018-04-241-0/+3
* intel/compiler: Silence unused parameter warnings in empty vec4_instruction_s...Ian Romanick2018-04-241-5/+5
* intel/ir: Allow representing additional flag subregisters in the IR.Francisco Jerez2018-03-021-1/+1
* intel/fs: Teach instruction scheduler about GRF bank conflict cycles.Francisco Jerez2017-12-071-2/+3
* i965: Use is_scheduling_barrier instead of schedule_node::is_barrier.Kenneth Graunke2017-10-191-22/+10
* i965: Move the back-end compiler to src/intel/compilerJason Ekstrand2017-03-131-0/+1753