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path: root/src/intel/compiler/brw_fs_nir.cpp
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* intel/fs: Implement quad_swap_horizontal with a swizzle on gen7Jason Ekstrand2019-07-301-7/+20
* intel: Use a system value for gl_FragCoordJason Ekstrand2019-07-291-5/+4
* nir,intel: lower if (cond) demote() to new intrinsic demote_if(cond)Daniel Schürmann2019-07-241-1/+3
* intel/compiler: Allow for varying subgroup sizesJason Ekstrand2019-07-241-0/+8
* intel/fs: Use a strided MOV instead of a conversion for load_* destinationsJason Ekstrand2019-07-171-5/+3
* intel/fs: Add support for SLM fence in Gen11Caio Marcelo de Oliveira Filho2019-07-111-4/+40
* intel/fs: Implement "demote to helper invocation"Caio Marcelo de Oliveira Filho2019-07-081-1/+23
* intel/fs: Implement nir_intrinsic_load_fs_input_interp_deltasJason Ekstrand2019-07-021-0/+12
* intel/fs: Actually implement the load_barycentric intrinsicsJason Ekstrand2019-07-021-9/+63
* intel/compiler: Emit ROR and ROL instructionSagar Ghuge2019-07-011-0/+7
* intel/compiler: don't use byte operands for src1 on ICLLionel Landwerlin2019-06-291-2/+9
* intel/fs: Improve discard_if code generationIan Romanick2019-06-051-3/+43
* intel/fs: Add need_dest parameter to fs_visitor::nir_emit_aluIan Romanick2019-06-051-3/+5
* intel/fs: Add an UNDEF instruction to avoid excess live rangesJason Ekstrand2019-06-041-0/+1
* intel/fs: Do a stalling MFENCE in endInvocationInterlock()Jason Ekstrand2019-05-301-2/+16
* intel/fs,vec4: Use g0 as the header for MFENCEJason Ekstrand2019-05-301-4/+3
* nir: Drop imov/fmov in favor of one mov instructionJason Ekstrand2019-05-241-5/+3
* intel: Implement abs, neg, and sat in the back-endJason Ekstrand2019-05-241-0/+22
* intel/compiler: Implement TCS 8_PATCH mode and INTEL_DEBUG=tcs8Kenneth Graunke2019-05-141-10/+86
* intel/compiler: Move ICP handle fetching into a helper function.Kenneth Graunke2019-05-141-36/+44
* intel/fs: Assert when brw_fs_nir sees a nir_deref_instrCaio Marcelo de Oliveira Filho2019-05-021-1/+1
* intel/fs: Don't emit empty ELSE blocks.Kenneth Graunke2019-04-281-4/+4
* intel/fs: Don't handle texop_tex for shaders without implicit LODCaio Marcelo de Oliveira Filho2019-04-251-6/+1
* intel/fs: Move the scalar-region conversion to the generator.Rafael Antognolli2019-04-221-2/+2
* intel/fs: Add support for float16 to the fsign optimizationsIan Romanick2019-04-201-6/+24
* intel/fs: Add support for bindless image load/store/atomicJason Ekstrand2019-04-191-7/+54
* intel/fs: Add support for bindless texture opsJason Ekstrand2019-04-191-2/+15
* anv: Implement VK_KHR_shader_atomic_int64Jason Ekstrand2019-04-191-2/+15
* intel/fs: Generate better code for fsign multiplied by a valueIan Romanick2019-04-181-0/+43
* intel/fs: Add a scale factor to emit_fsignIan Romanick2019-04-181-11/+76
* intel/fs: Refactor code generation for nir_op_fsign to its own functionIan Romanick2019-04-181-65/+63
* nir: Add a nir_src_as_intrinsic() helperJason Ekstrand2019-04-181-11/+4
* nir: Rework nir_src_as_alu_instr to not take a pointerJason Ekstrand2019-04-181-6/+4
* intel/compiler: ask for an integer type if requesting an 8-bit typeIago Toral Quiroga2019-04-181-2/+3
* intel/compiler: rework conversion opcodesIago Toral Quiroga2019-04-181-19/+22
* intel/compiler: drop unnecessary temporary from 32-bit fsign implementationIago Toral Quiroga2019-04-181-3/+2
* intel/compiler: implement 16-bit fsignIago Toral Quiroga2019-04-181-1/+16
* intel/compiler: assert restrictions on conversions to half-floatIago Toral Quiroga2019-04-181-2/+3
* intel/compiler: handle b2i/b2f with other integer conversion opcodesIago Toral Quiroga2019-04-181-8/+8
* intel/compiler: split float to 64-bit opcodes from int to 64-bitIago Toral Quiroga2019-04-181-0/+7
* intel/compiler/icl: Use tcs barrier id bits 24:30 instead of 24:27Topi Pohjolainen2019-04-171-7/+17
* nir: make nir_const_value scalarKarol Herbst2019-04-141-11/+11
* intel/nir: Take a nir_tex_instr and src index in brw_texture_offsetJason Ekstrand2019-04-141-8/+2
* nir/i965/freedreno/vc4: add a bindless bool to type size functionsTimothy Arceri2019-04-121-1/+1
* intel/fs: Use TEX_LOGICAL whenever implicit lod is supportedCaio Marcelo de Oliveira Filho2019-04-081-2/+6
* intel/fs: Fix extract_u8 of an odd byte from a 64-bit integerIan Romanick2019-03-061-0/+7
* intel/fs: nir_op_extract_i8 extracts a byte, not a wordIan Romanick2019-03-061-2/+4
* spirv: Use the same types for resource indices as pointersJason Ekstrand2019-03-051-0/+1
* nir/glsl: Add another way of doing lower_imul64 for gen8+Sagar Ghuge2019-03-041-0/+5
* intel/fs: Don't assert on b2f with a saturate modifierIan Romanick2019-03-021-1/+3
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