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path: root/src/intel/compiler/brw_fs_nir.cpp
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* intel/fs: Replace the CINTERP opcode with a simple MOVFrancisco Jerez2018-05-291-2/+2
* intel/fs: Use the ATTR file for FS inputsFrancisco Jerez2018-05-291-5/+3
* intel/fs: Rename a local variable so it doesn't shadow component()Francisco Jerez2018-05-291-4/+4
* i965/compiler: handle conversion to smaller type in the lowering pass for thatIago Toral Quiroga2018-05-051-11/+3
* intel/compiler: handle 16-bit to 64-bit conversions in BSW platformsIago Toral Quiroga2018-05-051-4/+4
* Revert "i965/compiler: handle conversion to smaller type in the lowering pass...Mark Janes2018-05-031-3/+11
* intel/compiler: implement 16-bit pack/unpack opcodesIago Toral Quiroga2018-05-031-0/+10
* intel/compiler: fix 16-bit comparisonsIago Toral Quiroga2018-05-031-8/+30
* intel/compiler: implement nir_instr_type_load_const for 16-bit constantsJose Maria Casanova Crespo2018-05-031-0/+5
* intel/compiler: implement conversions from 16-bit int/float to boolIago Toral Quiroga2018-05-031-5/+11
* intel/compiler: implement conversion between float/int 16-bit typesIago Toral Quiroga2018-05-031-0/+4
* i965/compiler: handle conversion to smaller type in the lowering pass for thatIago Toral Quiroga2018-05-031-11/+3
* intel/compiler: fix isign for 16-bit integersIago Toral Quiroga2018-05-031-5/+12
* intel: activate the gl_BaseVertex loweringAntia Puentes2018-05-021-4/+4
* intel: emit is_indexed_draw in the same VE than gl_DrawIDAntia Puentes2018-05-021-0/+2
* i965/fs: retype offset_reg to UD at load_ssboJose Maria Casanova Crespo2018-04-201-1/+1
* intel: Handle firstvertex in an identical way to BaseVertexAntia Puentes2018-04-191-0/+4
* nir+drivers: add helpers to get # of src/dest componentsRob Clark2018-04-031-6/+5
* intel/fs: Don't emit a des copy for image ops with has_dest == falseJason Ekstrand2018-03-271-3/+6
* nir: Rename image intrinsics to image_varJason Ekstrand2018-03-231-23/+23
* intel/fs: Add support for subgroup quad operationsJason Ekstrand2018-03-071-0/+94
* intel/fs: Implement reduce and scan opeprationsJason Ekstrand2018-03-071-0/+154
* i965/fs: Add support for nir_intrinsic_shuffleJason Ekstrand2018-03-071-0/+8
* i965/fs: Support nir_intrinsic_vote_feqJason Ekstrand2018-03-071-0/+6
* nir: Generalize nir_intrinsic_vote_eqJason Ekstrand2018-03-071-1/+1
* i965/fs: Implement basic SPIR-V subgroup intrinsicsJason Ekstrand2018-03-071-0/+8
* Revert "i965/fs: Predicate byte scattered writes if needed"Francisco Jerez2018-03-021-14/+1
* spirv/i965/anv: Relax push constant offset assertions being 32-bit alignedJose Maria Casanova Crespo2018-02-281-5/+10
* i965/fs: Support 16-bit store_ssbo with VK_KHR_relaxed_block_layoutJose Maria Casanova Crespo2018-02-281-7/+15
* i965/fs: Support 16-bit do_read_vector with VK_KHR_relaxed_block_layoutJose Maria Casanova Crespo2018-02-281-14/+37
* i965/fs: shuffle_32bit_load_result_to_16bit_data now skips componentsJose Maria Casanova Crespo2018-02-281-2/+4
* isl/i965/fs: SSBO/UBO buffers need size padding if not multiple of 32-bitJose Maria Casanova Crespo2018-02-281-1/+30
* i965/compiler: clean up nir_intrinsic_load_input for vertex shadersIago Toral Quiroga2018-02-141-11/+2
* intel/compiler: fix first_component for 64-bit types on vertex inputsIago Toral Quiroga2018-02-141-0/+3
* i965/fs: Use UW types when using V immediatesJason Ekstrand2018-01-111-2/+2
* i965: Combine {VS,FS}_OPCODE_GET_BUFFER_SIZE opcodes.Kenneth Graunke2017-12-301-1/+1
* i965/fs: Use untyped_surface_read for 16-bit load_ssboJose Maria Casanova Crespo2017-12-061-7/+20
* i965/fs: Optimize 16-bit SSBO stores by packing two into a 32-bit regJose Maria Casanova Crespo2017-12-061-15/+43
* i965/fs: Helpers for un/shuffle 16-bit pairs in 32-bit componentsJose Maria Casanova Crespo2017-12-061-0/+60
* i965/fs: Use byte scattered read for 16-bit load_ssboJose Maria Casanova Crespo2017-12-061-1/+13
* i965/fs: Predicate byte scattered writes if neededAlejandro Piñeiro2017-12-061-1/+14
* i965/fs: Use byte_scattered_write on 16-bit store_ssboAlejandro Piñeiro2017-12-061-20/+45
* i965/fs: Enable rounding mode on f2f16 opsAlejandro Piñeiro2017-12-061-0/+18
* i965/fs: Handle 32-bit to 16-bit conversionsAlejandro Piñeiro2017-12-061-0/+25
* i965: Use nir_lower_atomics_to_ssbos and delete ABO compiler code.Kenneth Graunke2017-11-151-47/+0
* i965/fs: Fix extract_i8/u8 to a 64-bit destinationMatt Turner2017-11-141-2/+23
* i965/fs: Split all 32->64-bit MOVs on CHV, BXT, GLKMatt Turner2017-11-141-4/+4
* intel/fs/nir: Return Q types from brw_reg_type_for_bit_sizeJason Ekstrand2017-11-071-2/+2
* intel/fs/nir: Use Q immediates for load_const on gen8+Jason Ekstrand2017-11-071-3/+11
* intel/fs/nir: Setup immediates based on type in i2b and f2bJason Ekstrand2017-11-071-1/+2
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