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path: root/src/intel/compiler/brw_fs_nir.cpp
Commit message (Expand)AuthorAgeFilesLines
* intel/fs: Add Fall-through commentCaio Marcelo de Oliveira Filho2020-06-081-0/+1
* nir: Replace the scoped_memory barrier by a scoped_barrierBoris Brezillon2020-06-031-2/+3
* intel/fs: Emit HALT for discard on Gen4-5Jason Ekstrand2020-05-301-7/+1
* intel/fs: Remove unused emission of load_simd_with_intelCaio Marcelo de Oliveira Filho2020-05-261-5/+0
* intel/fs: Use writes_memory from shader_infoCaio Marcelo de Oliveira Filho2020-05-181-25/+0
* intel/compiler: fix alignment assert in nir_emit_intrinsicArcady Goldmints-Orlov2020-05-121-1/+1
* intel/fs: Add and use a new load_simd_width_intel intrinsicCaio Marcelo de Oliveira Filho2020-05-011-0/+5
* intel/fs: Add an option to lower variable group size in backendCaio Marcelo de Oliveira Filho2020-05-011-1/+4
* intel/fs: Clean up variable group size handling in backendCaio Marcelo de Oliveira Filho2020-05-011-3/+3
* intel/fs: Update location of Render Target Array Index for gen12D Scott Phillips2020-05-011-1/+9
* intel/fs: Only stall after sending all memory fence messagesCaio Marcelo de Oliveira Filho2020-04-291-19/+16
* intel/fs,vec4: Pull stall logic for memory fences up into the IRCaio Marcelo de Oliveira Filho2020-04-291-40/+86
* intel/compiler: Delete abs/neg handling in fsign codeKenneth Graunke2020-04-221-27/+1
* intel/compiler: Put back saturate on [iu]add_sat opcodesKenneth Graunke2020-04-221-0/+1
* intel/compiler: Drop nir_lower_to_source_mods() and related handling.Kenneth Graunke2020-04-211-69/+10
* nir: Delete the fnoise opcodesJason Ekstrand2020-04-211-18/+0
* intel/compiler: Add support for variable workgroup sizePlamena Manolova2020-04-091-6/+28
* intel/fs: Choose memory message type based on bit sizeJason Ekstrand2020-04-031-30/+42
* intel/fs: Allow NOT instructions in conditional discard optimizationIan Romanick2020-03-091-1/+0
* nir: Move intel's intrinsic_image_coordinate_components() to core nir.Eric Anholt2020-02-241-22/+1
* intel/fs: Correctly handle multiply of fsign with a source modifierIan Romanick2020-02-191-0/+10
* intel/fs/gen7+: Implement discard/demote for SIMD32 programs.Francisco Jerez2020-02-141-1/+3
* intel/fs/gen7+: Swap sample mask flag register and FIND_LIVE_CHANNEL temporary.Francisco Jerez2020-02-141-3/+3
* intel/fs: Use helper for discard sample mask flag subregister number.Francisco Jerez2020-02-141-2/+2
* intel/fs: Implement support for NIR opcodes for INTEL_shader_integer_functions2Ian Romanick2020-01-231-0/+67
* intel/compiler: Move Gen4/5 rounding to visitorMatt Turner2020-01-221-0/+12
* intel/fs: Don't emit control barrier if only one thread is usedCaio Marcelo de Oliveira Filho2020-01-211-0/+9
* intel/fs: Don't emit fence for shared memory if only one thread is usedCaio Marcelo de Oliveira Filho2020-01-211-13/+23
* intel/fs: Switch to standard vector layout for barycentrics at optimization t...Francisco Jerez2020-01-171-48/+5
* intel/fs: Introduce barycentric layout lowering pass.Francisco Jerez2020-01-171-9/+5
* intel/compiler: Fix illegal mutation in get_nir_image_intrinsic_imageKenneth Graunke2020-01-151-3/+6
* intel/fs: Only use SLM fence in compute shadersCaio Marcelo de Oliveira Filho2020-01-141-0/+3
* nir/lower_atomics_to_ssbo: Also lower barriersJason Ekstrand2020-01-131-1/+0
* nir: Rename nir_intrinsic_barrier to control_barrierJason Ekstrand2020-01-131-2/+2
* nir: Add a new memory_barrier_tcs_patch intrinsicJason Ekstrand2020-01-131-0/+3
* intel/fs: Fix nir_intrinsic_load_barycentric_at_sample for SIMD32.Francisco Jerez2020-01-101-1/+1
* intel/compiler: add newline to limit_dispatch_width messageTapani Pälli2019-12-051-1/+1
* intel/fs: Disable conditional discard optimization on Gen4 and Gen5Ian Romanick2019-11-211-1/+8
* intel/compiler: fix nir_op_{i,u}*32 on ICLPaulo Zanoni2019-11-131-1/+1
* intel/fs: Implement the new load/store_scratch intrinsicsJason Ekstrand2019-11-111-0/+149
* intel/fs: Implement scoped_memory_barrierCaio Marcelo de Oliveira Filho2019-10-241-8/+19
* intel/fs/gen12: Implement gl_FrontFacing on gen12+.Jason Ekstrand2019-10-111-1/+18
* i965/fs: set rounding mode when emitting the flrp instructionAndres Gomez2019-09-241-0/+7
* i965/fs: add a comment about how the rounding mode in fmul is setAndres Gomez2019-09-241-0/+4
* intel/fs: Do 8-bit subgroup scan operations in 16 bitsJason Ekstrand2019-09-201-3/+39
* intel/fs: Allow UB, B, and HF types in brw_nir_reduction_op_identityJason Ekstrand2019-09-201-1/+7
* intel/fs: Add Fall-through commentCaio Marcelo de Oliveira Filho2019-09-191-0/+3
* intel/compiler: Record whether any pull constant loads occurKenneth Graunke2019-09-181-0/+4
* i965/fs: set rounding mode when emitting nir_op_f2f32 or nir_op_f2f16Samuel Iglesias Gonsálvez2019-09-171-5/+27
* i965/fs: set rounding mode when emitting fadd, fmul and ffma instructionsSamuel Iglesias Gonsálvez2019-09-171-1/+34
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