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path: root/src/intel/compiler/brw_fs_builder.h
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* intel/compiler: remove the operand restriction for src1 on GLKPaulo Zanoni2019-11-051-2/+1
* intel/fs: roll the loop with the <0,1,0> additions in emit_scan()Paulo Zanoni2019-09-191-32/+14
* intel/fs: make scan/reduce work with SIMD32 when it fits 2 registersPaulo Zanoni2019-09-191-0/+23
* intel/compiler: Enable the emission of ROR/ROL instructionsSagar Ghuge2019-07-011-0/+2
* intel/compiler: don't use byte operands for src1 on ICLLionel Landwerlin2019-06-291-9/+29
* intel/fs: Add an UNDEF instruction to avoid excess live rangesJason Ekstrand2019-06-041-0/+11
* intel/compiler: Improve fix_3src_operand()Matt Turner2019-04-221-5/+18
* intel/fs: Use split sends for surface writes on gen9+Jason Ekstrand2019-01-291-0/+15
* intel/fs: Remove nasty open-coded CHV/BXT 64-bit workarounds.Francisco Jerez2019-01-091-65/+3
* intel/fs: Prevent emission of IR instructions not aligned to their own execut...Francisco Jerez2018-11-091-3/+17
* intel/fs: Fix a typo in need_matching_subreg_offsetJason Ekstrand2018-10-021-1/+1
* intel/fs: Fix fs_builder::sample_mask_reg() for 32-wide FS dispatch.Francisco Jerez2018-06-281-3/+3
* i965/fs: Add infrastructure for generating CSEL instructions.Kenneth Graunke2018-03-081-1/+21
* intel/fs: Add a helper for emitting scan operationsJason Ekstrand2018-03-071-0/+141
* intel/ir: Allow arbitrary scratch flag registers for SHADER_OPCODE_FIND_LIVE_...Francisco Jerez2018-03-021-1/+1
* intel/compiler: Lower flrp32 on Gen11+Matt Turner2018-02-281-1/+1
* i965: Move the back-end compiler to src/intel/compilerJason Ekstrand2017-03-131-0/+662
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