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path: root/src/intel/compiler/brw_fs.cpp
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* i965/gen10: Re-enable push constants.Rafael Antognolli2018-01-261-9/+0
* i965/fs: Reset the register file to VGRF in lower_integer_multiplicationJason Ekstrand2018-01-251-5/+10
* i965: Use UD types for gl_SampleID setupJason Ekstrand2018-01-111-3/+3
* i965/fs: Use UW types when using V immediatesJason Ekstrand2018-01-111-3/+3
* i965: Combine {VS,FS}_OPCODE_GET_BUFFER_SIZE opcodes.Kenneth Graunke2017-12-301-1/+1
* intel/compiler/gen10: Disable push constants.Rafael Antognolli2017-12-191-0/+9
* intel/fs/bank_conflicts: Don't touch Gen7 MRF hack registers.Francisco Jerez2017-12-121-1/+1
* i965/fs: Handle !supports_pull_constants and push UBOs properlyJason Ekstrand2017-12-081-1/+1
* i965/fs: Rewrite assign_constant_locationsJason Ekstrand2017-12-081-133/+185
* intel/fs: Implement GRF bank conflict mitigation pass.Francisco Jerez2017-12-071-0/+2
* i965/fs: Enables 16-bit load_ubo with samplerJason Ekstrand2017-12-061-7/+14
* i965/fs: Add byte scattered read message and fs supportJose Maria Casanova Crespo2017-12-061-0/+21
* i965/fs: Add byte scattered write message and fs supportJose Maria Casanova Crespo2017-12-061-0/+14
* i965/fs: Add remove_extra_rounding_modes optimizationAlejandro Piñeiro2017-12-061-0/+37
* i965: Support for 16-bit base types in helper functionsJose Maria Casanova Crespo2017-12-061-0/+4
* intel/fs: Explicitly set EXECUTE_1 where neededJason Ekstrand2017-11-071-1/+1
* intel/cs: Push subgroup ID instead of base thread IDJason Ekstrand2017-11-071-15/+15
* intel/cs: Re-run final NIR optimizations for each SIMD sizeJason Ekstrand2017-11-071-41/+69
* i965/fs: Get rid of the early return in brw_compile_csJason Ekstrand2017-11-071-13/+14
* intel/cs: Rework the way thread local ID is handledJason Ekstrand2017-11-071-2/+2
* intel/fs: Mark 64-bit values as being contiguousJason Ekstrand2017-11-071-1/+4
* intel/cs: Ignore runtime_check_aads_emit for CSJason Ekstrand2017-11-071-2/+1
* intel/cs: Stop setting dispatch_grf_start_regJason Ekstrand2017-11-071-2/+0
* intel/cs: Drop max_dispatch_width checks from compile_csJason Ekstrand2017-11-071-4/+8
* intel/fs: Remove min_dispatch_width from fs_visitorJason Ekstrand2017-11-071-19/+23
* intel/fs: use pull constant locations to check for first compile of a shaderJason Ekstrand2017-11-071-1/+3
* intel/fs: Protect opt_algebraic from OOB BROADCAST indicesJason Ekstrand2017-11-071-2/+11
* intel/fs: Use the original destination region for int MUL loweringJason Ekstrand2017-11-071-7/+9
* intel/fs: Fix integer multiplication lowering for src/dst hazardsJason Ekstrand2017-11-071-2/+8
* intel/fs: Be more explicit about our placement of [un]zipJason Ekstrand2017-11-071-3/+17
* intel/fs: Pass builders instead of blocks into emit_[un]zipJason Ekstrand2017-11-071-26/+35
* intel/fs: Don't allocate a param array for zero push constantsJason Ekstrand2017-11-021-1/+8
* intel/fs: Alloc pull constants off mem_ctxJason Ekstrand2017-11-021-1/+1
* intel/compiler: Remove final_program_size from brw_compile_*Jordan Justen2017-10-311-8/+2
* intel/compiler: add new field for storing program sizeCarl Worth2017-10-311-2/+6
* i965: fix blorp stage_prog_data->param leakTapani Pälli2017-10-301-1/+1
* intel/compiler/gen9: Pixel shader header only workaroundTopi Pohjolainen2017-10-281-0/+29
* intel/fs: Handle flag read/write aliasing in needs_src_copyJason Ekstrand2017-10-251-1/+3
* i965: Move fs_inst::has_side_effects()'s eot check to the parent class.Kenneth Graunke2017-10-191-6/+0
* intel/cs: Make thread_local_id a regular builtin paramJason Ekstrand2017-10-121-22/+20
* intel/compiler: Allocate pull_param in assign_constant_locationsJason Ekstrand2017-10-121-6/+9
* intel/cs: Grow prog_data::param on-demand for thread_local_id_indexJason Ekstrand2017-10-121-8/+0
* intel/compiler: Make brw_nir_lower_intrinsics compute-specificJason Ekstrand2017-10-121-1/+1
* intel/compiler: Add a flag for pull constant supportJason Ekstrand2017-10-121-1/+4
* intel: Rewrite the world of push/pull paramsJason Ekstrand2017-10-121-7/+5
* i965: skip reading unused slots at the begining of the URB for the FSIago Toral Quiroga2017-10-021-4/+3
* i965/fs: force pull model for 64-bit GS inputsIago Toral Quiroga2017-09-291-6/+12
* anv,i965: Move CS shared lowering into anvJason Ekstrand2017-08-241-2/+0
* i965: Add a brw_wm_prog_data::has_render_target_reads field.Kenneth Graunke2017-08-231-0/+2
* i965: Move brw_reg_type_letters() as wellMatt Turner2017-08-211-2/+2
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