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path: root/src/intel/compiler/brw_eu_emit.c
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* intel/eu: Use EXECUTE_1 for JMPIJason Ekstrand2017-10-251-1/+1
* i965: Add align1 ternary instruction emission supportMatt Turner2017-10-201-55/+160
* i965: Add functions to abstract access to 3src register typesMatt Turner2017-10-201-20/+2
* i965: Rename brw_inst's functions that access the 3src register typeMatt Turner2017-10-201-8/+8
* i965: Rename brw_inst 3src functions in preparation for align1Matt Turner2017-10-201-24/+24
* i965: Remove validate_reg()Matt Turner2017-10-041-80/+0
* i965: Switch to using the logical register typesMatt Turner2017-08-211-10/+3
* i965: Rename brw_inst's functions that access the register typeMatt Turner2017-08-211-9/+9
* i965: Extract functions dealing with register types to separate fileMatt Turner2017-08-211-102/+0
* i965: Reverse file/type arguments to register type functionsMatt Turner2017-08-211-6/+8
* i965: Use separate enums for register vs immediate typesMatt Turner2017-08-211-55/+54
* i965: Reorder brw_reg_type enum valuesMatt Turner2017-08-211-6/+0
* i965: Validate destination restrictions with vector immediatesMatt Turner2017-08-211-12/+1
* i965: Move compaction "prepass" into brw_eu_compact.cMatt Turner2017-08-211-70/+2
* intel/compiler: remove check unsigned is >= 0Lionel Landwerlin2017-07-131-1/+1
* i965: Use correct VertStride on align16 instructions.Matt Turner2017-04-141-10/+34
* i965: Use source region <1,2,0> when converting to DF.Matt Turner2017-04-141-1/+27
* i965: Move the back-end compiler to src/intel/compilerJason Ekstrand2017-03-131-0/+3675