index
:
mesa.git
gallium_va_encpackedheader01
master
Unnamed repository; edit this file 'description' to name the repository.
summary
refs
log
tree
commit
diff
stats
log msg
author
committer
range
path:
root
/
src
/
intel
/
compiler
/
brw_eu_emit.c
Commit message (
Expand
)
Author
Age
Files
Lines
*
intel/eu: Explicitly set EXECUTE_1 where needed
Jason Ekstrand
2017-11-07
1
-0
/
+9
*
intel/eu: Make automatic exec sizes a configurable option
Jason Ekstrand
2017-11-07
1
-14
/
+18
*
intel/eu: Fix broadcast instruction for 64-bit values on little-core
Jason Ekstrand
2017-11-07
1
-2
/
+24
*
intel/eu: Just modify the offset in brw_broadcast
Jason Ekstrand
2017-11-07
1
-4
/
+5
*
intel/compiler: Add some restrictions to MOV_INDIRECT and BROADCAST
Jason Ekstrand
2017-11-07
1
-0
/
+16
*
intel/eu: Use EXECUTE_1 for JMPI
Jason Ekstrand
2017-10-25
1
-1
/
+1
*
i965: Add align1 ternary instruction emission support
Matt Turner
2017-10-20
1
-55
/
+160
*
i965: Add functions to abstract access to 3src register types
Matt Turner
2017-10-20
1
-20
/
+2
*
i965: Rename brw_inst's functions that access the 3src register type
Matt Turner
2017-10-20
1
-8
/
+8
*
i965: Rename brw_inst 3src functions in preparation for align1
Matt Turner
2017-10-20
1
-24
/
+24
*
i965: Remove validate_reg()
Matt Turner
2017-10-04
1
-80
/
+0
*
i965: Switch to using the logical register types
Matt Turner
2017-08-21
1
-10
/
+3
*
i965: Rename brw_inst's functions that access the register type
Matt Turner
2017-08-21
1
-9
/
+9
*
i965: Extract functions dealing with register types to separate file
Matt Turner
2017-08-21
1
-102
/
+0
*
i965: Reverse file/type arguments to register type functions
Matt Turner
2017-08-21
1
-6
/
+8
*
i965: Use separate enums for register vs immediate types
Matt Turner
2017-08-21
1
-55
/
+54
*
i965: Reorder brw_reg_type enum values
Matt Turner
2017-08-21
1
-6
/
+0
*
i965: Validate destination restrictions with vector immediates
Matt Turner
2017-08-21
1
-12
/
+1
*
i965: Move compaction "prepass" into brw_eu_compact.c
Matt Turner
2017-08-21
1
-70
/
+2
*
intel/compiler: remove check unsigned is >= 0
Lionel Landwerlin
2017-07-13
1
-1
/
+1
*
i965: Use correct VertStride on align16 instructions.
Matt Turner
2017-04-14
1
-10
/
+34
*
i965: Use source region <1,2,0> when converting to DF.
Matt Turner
2017-04-14
1
-1
/
+27
*
i965: Move the back-end compiler to src/intel/compiler
Jason Ekstrand
2017-03-13
1
-0
/
+3675