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path: root/src/intel/compiler/brw_eu.h
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* intel/eu: Switch to a logical state stackJason Ekstrand2018-06-041-2/+32
* intel/eu: Add some brw_get_default_ helpersJason Ekstrand2018-06-041-0/+3
* i965: Add ARB_fragment_shader_interlock support.Plamena Manolova2018-06-011-1/+2
* intel/eu: Remove brw_codegen::compressed_stack.Francisco Jerez2018-05-291-1/+0
* mesa: include mtypes.h lessMarek Olšák2018-04-121-0/+1
* i965/fs: Add infrastructure for generating CSEL instructions.Kenneth Graunke2018-03-081-0/+1
* intel/eu: Plumb header present bit to codegen helpers for HDC messages.Francisco Jerez2018-03-021-6/+12
* i965/fs: Add byte scattered read message and fs supportJose Maria Casanova Crespo2017-12-061-0/+8
* i965/fs: Add byte scattered write message and fs supportJose Maria Casanova Crespo2017-12-061-0/+7
* i965/fs: Define new shader opcode to set rounding modesAlejandro Piñeiro2017-12-061-0/+4
* i965: Rename intel_asm_annotation -> brw_disasm_infoMatt Turner2017-11-171-1/+1
* i965: Rewrite disassembly annotation codeMatt Turner2017-11-171-2/+2
* intel/eu: Make automatic exec sizes a configurable optionJason Ekstrand2017-11-071-0/+10
* intel/compiler: brw_validate_instructions to take const void* instead of void*Kevin Rogovin2017-10-261-1/+1
* i965: Mark src inst pointer const in compaction codeMatt Turner2017-08-211-1/+1
* intel/compiler: Make brw_disasm take const assemblyJason Ekstrand2017-05-261-3/+3
* i965: Pass pointer and end of assembly to brw_validate_instructionsMatt Turner2017-05-151-1/+2
* i965: Move the back-end compiler to src/intel/compilerJason Ekstrand2017-03-131-0/+612
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