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* intel/disasm: SEND has two sources on Gen12+Jason Ekstrand2020-01-311-2/+4
| | | | | | Reviewed-by: Caio Marcelo de Oliveira Filho <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3642>
* intel/compiler: Return early if read() failedEmmanuel Gil Peyrot2020-01-221-1/+4
| | | | | | | | This was the only warning I could see while compiling Iris. Reviewed-by: Matt Turner <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2821> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2821>
* intel/compiler: Extract GEN_* macros into separate fileMatt Turner2020-01-221-37/+1
| | | | | | | Will be used by the instruction compaction unit test. Reviewed-by: Caio Marcelo de Oliveira Filho <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2635>
* intel/compiler: replace `0` pointer with `NULL`Eric Engestrom2019-12-131-1/+1
| | | | | Signed-off-by: Eric Engestrom <[email protected]> Reviewed-by: Caio Marcelo de Oliveira Filho <[email protected]>
* intel/compiler: add ASSERTED annotation to avoid "unused variable" warningEric Engestrom2019-12-131-3/+4
| | | | | Signed-off-by: Eric Engestrom <[email protected]> Reviewed-by: Caio Marcelo de Oliveira Filho <[email protected]>
* intel/eu/gen12: Add tracking of default SWSB state to the current ↵Francisco Jerez2019-10-111-0/+11
| | | | | | brw_codegen instruction. Reviewed-by: Caio Marcelo de Oliveira Filho <[email protected]>
* intel/ir/gen12: Add SYNC hardware instruction.Francisco Jerez2019-10-111-0/+1
| | | | | Reviewed-by: Caio Marcelo de Oliveira Filho <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* intel/eu/gen12: Add Gen12 opcode descriptions to the table.Francisco Jerez2019-10-111-24/+47
| | | | | | | | | | Quite a lot of churn because the encoding of most hardware opcodes has changed unfortunately. v2: Split dot-product description fixes to separate patch (Caio). Reviewed-by: Caio Marcelo de Oliveira Filho <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* intel/eu/gen11+: Mark dot product opcodes as unsupported on opcode_descs table.Francisco Jerez2019-10-111-4/+4
| | | | | | These instructions have been removed from the hardware. Reviewed-by: Caio Marcelo de Oliveira Filho <[email protected]>
* intel/eu: Rework opcode description tables to allow efficient look-up by ↵Francisco Jerez2019-10-111-0/+630
either HW or IR opcode. This rewrites the current opcode description tables as a more compact flat data structure. The purpose is to allow efficient constant-time look-up by either HW or IR opcode, which will allow us to drop the hard-coded correspondence between HW and IR opcodes -- See the next commits for the rationale. brw_eu.c is now built as C++ source so we can take advantage of pointers to member in order to make the look-up function work regardless of the opcode_desc member used as look-up key. v2: Optimize devinfo struct comparison (Caio) Reviewed-by: Caio Marcelo de Oliveira Filho <[email protected]> Reviewed-by: Jordan Justen <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
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