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* intel/decoders: silence uninitialized variable warnings in gen_print_batch()Brian Paul2019-03-081-2/+2
| | | | Reviewed-by: Lionel Landwerlin <[email protected]>
* intel/decoders: limit number of decoded batchbuffersLionel Landwerlin2019-03-072-2/+15
| | | | | | | | | | | IGT has a test to hang the GPU that works by having a batch buffer jump back into itself, trigger an infinite loop on the command stream. As our implementation of the decoding is "perfectly" mimicking the hardware, our decoder also "hangs". This change limits the number of batch buffer we'll decode before we bail to 100. Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Rafael Antognolli <[email protected]>
* intel/decoders: handle decoding MI_BBS from ringLionel Landwerlin2019-03-072-4/+4
| | | | | | | | | An MI_BATCH_BUFFER_START in the ring buffer acts as a second level batchbuffer (aka jump back to ring buffer when running into a MI_BATCH_BUFFER_END). Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Rafael Antognolli <[email protected]>
* intel/decoders: add address space indicator to get BOsLionel Landwerlin2019-03-072-15/+22
| | | | | | | Some commands like MI_BATCH_BUFFER_START have this indicator. Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Rafael Antognolli <[email protected]>
* intel/debug: Add a debug flag to force software fp64Jason Ekstrand2019-03-062-1/+3
| | | | | | Reviewed-by: Matt Turner <[email protected]> Reviewed-by: Jordan Justen <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* drm-uapi: use local files, not system libdrmEric Engestrom2019-02-141-1/+1
| | | | | | | | | There was an issue recently caused by the system header being included by mistake, so let's just get rid of this include path and always explicitly #include "drm-uapi/FOO.h" Signed-off-by: Eric Engestrom <[email protected]> Reviewed-by: Kristian H. Kristensen <[email protected]>
* intel/batch-decoder: fix a vb end address calculationAndrii Simiklit2019-01-251-1/+3
| | | | | | | | | | According to the loop implementation (in 'ctx_print_buffer' function), which advances dword by dword over vertex buffer(vb), the vb size should be aligned by 4 bytes too. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=109449 Signed-off-by: Andrii Simiklit <[email protected]> Reviewed-by: Lionel Landwerlin <[email protected]>
* intel/batch-decoder: fix vertex buffer size calculation for gen<8Andrii Simiklit2019-01-251-1/+1
| | | | | | | | | | | | | | | | It should be incremented by one according to how it is calculated by 'emit_vertex_buffer_state': "\#if GEN_GEN < 8 .BufferAccessType = step_rate ? INSTANCEDATA : VERTEXDATA, .InstanceDataStepRate = step_rate, \#if GEN_GEN >= 5 .EndAddress = ro_bo(bo, end_offset - 1), \#endif \#endif" Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=109449 Signed-off-by: Andrii Simiklit <[email protected]> Reviewed-by: Lionel Landwerlin <[email protected]>
* intel/icl: Set way_size_per_bank to 4Anuj Phogat2018-11-261-1/+2
| | | | | Signed-off-by: Anuj Phogat <[email protected]> Reviewed-by: Francisco Jerez <[email protected]>
* i965/icl: Fix L3 configurationsAnuj Phogat2018-11-261-6/+6
| | | | | | | | | | Use L3 configuration specified in h/w specification. V2: Drop configs which do under allocation of l3 cache. Bump up the comment above table. Signed-off-by: Anuj Phogat <[email protected]> Reviewed-by: Francisco Jerez <[email protected]>
* intel/decoder: tools: Use engine for decoding batch instructionsToni Lönnberg2018-11-133-12/+26
| | | | | | | | | | | | | | | | The engine to which the batch was sent to is now set to the decoder context when decoding the batch. This is needed so that we can distinguish between instructions as the render and video pipe share some of the instruction opcodes. v2: The engine is now in the decoder context and the batch decoder uses a local function for finding the instruction for an engine. v3: Spec uses engine_mask now instead of engine, replaced engine class enums with the definitions from UAPI. v4: Fix up aubinator_viewer (Lionel) Reviewed-by: Lionel Landwerlin <[email protected]>
* intel/decoder: Engine parameter for instructionsToni Lönnberg2018-11-132-0/+31
| | | | | | | | | | | | | | | | | | | Preliminary work for adding handling of different pipes to gen_decoder. Each instruction needs to have a definition describing which engine it is meant for. If left undefined, by default, the instruction is defined for all engines. v2: Changed to use the engine class definitions from UAPI v3: Changed I915_ENGINE_CLASS_TO_MASK to use BITSET_BIT, change engine to engine_mask, added check for incorrect engine and added the possibility to define an instruction to multiple engines using the "|" as a delimiter in the engine attribute. v4: Fixed the memory leak. v5: Removed an unnecessary ralloc_free(). Reviewed-by: Lionel Landwerlin <[email protected]>
* intel/decoders: fix instruction base address parsingLionel Landwerlin2018-11-051-1/+1
| | | | | | Signed-off-by: Lionel Landwerlin <[email protected]> Fixes: 00103db04ab879 ("intel: Fix decoding for partial STATE_BASE_ADDRESS updates.") Reviewed-by: Kenneth Graunke <[email protected]>
* intel: Use a URB start offset of 0 for disabled stages.Kenneth Graunke2018-11-031-3/+9
| | | | | | | | | | | | | | | | | | | | | | | There are some cases where the VS is the only stage enabled, it uses the entire URB, and the URB is large enough that placing later stages after the VS exceeds the number of bits for "URB Starting Address". For example, on Icelake GT2, "varying-packing-simple mat2x4 array" from Piglit is getting a starting offset of 128 for the GS/HS/DS. But the field is only large enough to hold an offset of 127. i965 doesn't hit any genxml assertions because it's still using the old OUT_BATCH mechanism. 128 << GEN7_URB_STARTING_ADDRESS_SHIFT (57) == 0, with the extra bit falling off the end. So we place the disabled stage at the beginning of the URB (overlapping with push constants). This is likely okay since it's a zero size region (0 entries). It seems like the Vulkan driver might hit this assertion, however, and the situation seems harmless. To work around this, always place disabled stages at the start of the URB, so the last enabled stage can fill the remaining space without overflowing the field. Reviewed-by: Jordan Justen <[email protected]>
* intel/decoder: Use 'DWord Length' and 'bias' fields for packet length.Toni Lönnberg2018-10-302-7/+25
| | | | | | | | Use the 'DWord Length' and 'bias' fields from the instruction definition to parse the packet length from the command stream when possible. The hardcoded mechanism is used whenever an instruction doesn't have this field. Reviewed-by: Lionel Landwerlin <[email protected]>
* intel/batch-decoder: remove never-used functionEric Engestrom2018-10-301-21/+0
| | | | | | | | | This function was there when the file was introduced in commit 38f10d5a03542c60a589 "intel: tools: add aubinator viewer", but was never actually used. Signed-off-by: Eric Engestrom <[email protected]> Reviewed-by: Lionel Landwerlin <[email protected]>
* util: use C99 declaration in the for-loop hash_table_foreach() macroEric Engestrom2018-10-251-2/+0
| | | | | Signed-off-by: Eric Engestrom <[email protected]> Reviewed-by: Timothy Arceri <[email protected]>
* intel/decoders: fix end of batch limitLionel Landwerlin2018-10-231-1/+1
| | | | | | | | | | | | | Pointer arithmetic... v2: s/4/sizeof(uint32_t)/ (Eric) v3: Give bytes to print_batch() in error_decode (Lionel) Make clear what values we're dealing with in error_decode (Lionel) Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Eric Engestrom <[email protected]> (v2) Reviewed-by: Kenneth Graunke <[email protected]>
* intel: Fix decoding for partial STATE_BASE_ADDRESS updates.Kenneth Graunke2018-10-221-3/+21
| | | | | | | | | | | STATE_BASE_ADDRESS only modifies various bases if the "modify" bit is set. Otherwise, we want to keep the existing base address. Iris uses this for updating Surface State Base Address while leaving the others as-is. v2: Also update aubinator_viewer_decoder (caught by Lionel) Reviewed-by: Lionel Landwerlin <[email protected]>
* intel/decoder: construct correct xml filenameSagar Ghuge2018-10-041-8/+7
| | | | | | | | | | construct correct gen xml filename when we try to load hardware xml description from a given path v2: remove temporary variable (Francesco Ansanelli) Signed-off-by: Sagar Ghuge <[email protected]> Reviewed-by: Lionel Landwerlin <[email protected]>
* intel/decoder: Avoid freeing invalid pointerSagar Ghuge2018-10-041-5/+13
| | | | | | | | | v2: Free ctx.spec if error while reading genxml (Lionel Landwerlin) v3: Handle case where genxml is empty (Lionel Landwerlin) Signed-off-by: Sagar Ghuge <[email protected]> Reviewed-by: Lionel Landwerlin <[email protected]>
* intel/decoder: add gen_spec_init methodSagar Ghuge2018-10-041-16/+35
| | | | | | | | | | Initialize gen_spec instance properly when loading hardware xml description from specifc directory to avoid segmentation fault. v2: correct function definition (Lionel Landwerlin) Signed-off-by: Sagar Ghuge <[email protected]> Reviewed-by: Lionel Landwerlin <[email protected]>
* intel/decoder: fix the possible out of bounds group_iterAndrii Simiklit2018-09-031-1/+4
| | | | | | | | | | | The "gen_group_get_length" function can return a negative value and it can lead to the out of bounds group_iter. v2: printing of "unknown command type" was added v3: just the asserts are added Signed-off-by: Andrii Simiklit <[email protected]> Reviewed-by: Lionel Landwerlin <[email protected]>
* intel: decoder: handle 0 sized structsLionel Landwerlin2018-08-271-4/+8
| | | | | | | | | | Gen7.5 has a BLEND_STATE of size 0 which includes a variable length group. We did not deal with that very well, leading to an endless loop. Signed-off-by: Lionel Landwerlin <[email protected]> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107544 Reviewed-by: Jason Ekstrand <[email protected]>
* intel/tools: Add 0x in front of a couple of hex valuesJason Ekstrand2018-08-251-2/+2
| | | | Reviewed-by: Lionel Landwerlin <[email protected]>
* intel/batch_decoder: Print blend states properlyJason Ekstrand2018-08-251-1/+16
| | | | Reviewed-by: Lionel Landwerlin <[email protected]>
* intel/batch_decoder: Fix dynamic state printingJason Ekstrand2018-08-251-2/+2
| | | | | | | | | Instead of printing addresses like everyone else, we were accidentally printing the offset from state base address. Also, state_map is a void pointer so we were incrementing in bytes instead of dwords and every state other than the first was wrong. Reviewed-by: Lionel Landwerlin <[email protected]>
* intel/decoder: Print ISL formats for vertex elementsJason Ekstrand2018-08-251-1/+2
| | | | Reviewed-by: Lionel Landwerlin <[email protected]>
* intel/decoder: Clean up field iteration and fix sub-dword fieldsJason Ekstrand2018-08-251-16/+16
| | | | | | | | | | | | | First of all, setting iter->name in advance_field is unnecessary because it gets set by gen_decode_field which gets called immediately after gen_decode_field in the one call-site. Second, we weren't properly initializing start_bit and end_bit in the initial condition of gen_field_iterator_next so the first field of a struct would get printed wrong if it doesn't start on the first bit. This is fixed by adding a iter_start_field helper which sets the field and also sets up the other bits we need. This fixes decoding of 3DSTATE_SBE_SWIZ. Reviewed-by: Lionel Landwerlin <[email protected]>
* intel/decoder: Decode SFIXED values.Kenneth Graunke2018-08-231-3/+7
| | | | | | This lets us example SAMPLER_STATE's LOD Bias field, among other things. Reviewed-by: Lionel Landwerlin <[email protected]>
* intel/decoder: mark total_length as MAYBE_UNUSED in gen_spec_loadKai Wasserbäch2018-08-201-1/+2
| | | | | | | | | | | | | Only used, when asserts are enabled. Fixes an unused-variable warning with GCC 8: ../../../src/intel/common/gen_decoder.c: In function 'gen_spec_load': ../../../src/intel/common/gen_decoder.c:535:47: warning: variable 'total_length' set but not used [-Wunused-but-set-variable] uint32_t text_offset = 0, text_length = 0, total_length; ^~~~~~~~~~~~ Signed-off-by: Kai Wasserbäch <[email protected]> Reviewed-by: Lionel Landwerlin <[email protected]>
* intel/batch-decoder: replace local ARRAY_LENGTH() macro with global ARRAY_SIZE()Eric Engestrom2018-08-161-3/+2
| | | | | Signed-off-by: Eric Engestrom <[email protected]> Reviewed-by: Lionel Landwerlin <[email protected]>
* intel: Switch the order of the 2x MSAA sample positionsJason Ekstrand2018-08-111-4/+4
| | | | | | | | The Vulkan 1.1.82 spec flipped the order to better match D3D. Cc: [email protected] Reviewed-by: Iago Toral Quiroga <[email protected]> Reviewed-by: Anuj Phogat <[email protected]>
* intel: common: add missing stdint includeLionel Landwerlin2018-08-041-0/+2
| | | | Reviewed-by: Eric Engestrom <[email protected]>
* intel: decoder: remove unused variableLionel Landwerlin2018-08-041-2/+0
| | | | | Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Eric Engestrom <[email protected]>
* i965: Disable shader cache with INTEL_DEBUG=shader_timeJordan Justen2018-08-011-2/+5
| | | | | | | | | | | | | | | | | | | Shader time hard codes an index of the shader time buffer within the gen program. In order to support shader time in the disk shader cache, we'd need to add the shader time index into the program key. This should work, but probably is not worth it for this particular debug feature. Therefore, let's just disable the disk shader cache if the shader time debug feature is used. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=106382 Fixes: 96fe36f7acc "i965: Enable disk shader cache by default" Cc: Eero Tamminen <[email protected]> Cc: Kenneth Graunke <[email protected]> Signed-off-by: Jordan Justen <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* intel: Make the decoder just store addresses for bases, not buffers.Kenneth Graunke2018-07-252-12/+12
| | | | | | | | | | The various base addresses are simply addresses. There may or may not be a buffer located at those addresses. So, it doesn't make much sense to request one. Just save the raw address so we can add it later, when asking about BOs at the final <base + offset> address. Suggested-by: Lionel Landwerlin <[email protected]> Reviewed-by: Lionel Landwerlin <[email protected]>
* intel: Make the decoder handle STATE_BASE_ADDRESS not being a buffer.Kenneth Graunke2018-07-252-38/+46
| | | | | | | | | | | | | | | | | | | | | | | | Normally, i965 programs STATE_BASE_ADDRESS every batch, and puts all state for a given base in a single buffer. I'm working on a prototype which emits STATE_BASE_ADDRESS only once at startup, where each base address is a fixed 4GB region of the PPGTT. State may live in many buffers in that 4GB region, even if there isn't a buffer located at the actual base address itself. To handle this, we need to save the STATE_BASE_ADDRESS values across multiple batches, rather than assuming we'll see the command each time. Then, each time we see a pointer, we need to ask the driver for the BO map for that data. (We can't just use the map for the base address, as state may be in multiple buffers, and there may not even be a buffer at the base address to map.) v2: Fix things caught in review by Lionel: - Drop bogus bind_bo.size check. - Drop "get the BOs again" code - we just get the BOs as needed - Add a message about interface descriptor data being unavailable Reviewed-by: Lionel Landwerlin <[email protected]>
* i965, anv: Use INTEL_DEBUG for disk_cache driver flagsJordan Justen2018-07-241-0/+5
| | | | | | | | | | | | | | | | | | | Since various options within INTEL_DEBUG could impact code generation, we need to set the disk cache driver_flags parameter based on the INTEL_DEBUG flags in use. An example that will affect the program generated by i965 is the INTEL_DEBUG=nocompact option. The DEBUG_DISK_CACHE_MASK value is added to mask the settings of INTEL_DEBUG that can affect program generation. v2: * Use driver_flags (Tim) * Also update Anvil (Jason) Signed-off-by: Jordan Justen <[email protected]> Reviewed-by: Lionel Landwerlin <[email protected]>
* intel: Make the disassembler take a const pointer to the assembly.Kenneth Graunke2018-07-242-4/+5
| | | | | | Disassembling doesn't modify the assembly. Reviewed-by: Lionel Landwerlin <[email protected]>
* intel/batch-decoder: fix uninitialized values warningsCaio Marcelo de Oliveira Filho2018-07-181-5/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Code assumes that all the necessary fields will exist, but compiler doesn't know about this. Provide zero as default values, like in other decoding functions. Fixes warnings ../../src/intel/common/gen_batch_decoder.c: In function ‘handle_media_interface_descriptor_load’: ../../src/intel/common/gen_batch_decoder.c:347:7: warning: ‘binding_entry_count’ may be used uninitialized in this function [-Wmaybe-uninitialized] dump_binding_table(ctx, binding_table_offset, binding_entry_count); ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ../../src/intel/common/gen_batch_decoder.c:347:7: warning: ‘binding_table_offset’ may be used uninitialized in this function [-Wmaybe-uninitialized] ../../src/intel/common/gen_batch_decoder.c:346:7: warning: ‘sampler_count’ may be used uninitialized in this function [-Wmaybe-uninitialized] dump_samplers(ctx, sampler_offset, sampler_count); ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ../../src/intel/common/gen_batch_decoder.c:346:7: warning: ‘sampler_offset’ may be used uninitialized in this function [-Wmaybe-uninitialized] ../../src/intel/common/gen_batch_decoder.c:343:7: warning: ‘ksp’ may be used uninitialized in this function [-Wmaybe-uninitialized] ctx_disassemble_program(ctx, ksp, "compute shader"); ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ../../src/intel/common/gen_batch_decoder.c: In function ‘decode_dynamic_state_pointers’: ../../src/intel/common/gen_batch_decoder.c:663:54: warning: ‘state_offset’ may be used uninitialized in this function [-Wmaybe-uninitialized] const uint32_t *state_map = ctx->dynamic_base.map + state_offset; ~~~~~~~~~~~~~~~~~~~~~~^~~~~~~~~~~~~~ ../../src/intel/common/gen_batch_decoder.c: In function ‘gen_print_batch’: ../../src/intel/common/gen_batch_decoder.c:856:13: warning: ‘next_batch.map’ may be used uninitialized in this function [-Wmaybe-uninitialized] if (next_batch.map == NULL) { ^ ../../src/intel/common/gen_batch_decoder.c:860:13: warning: ‘next_batch.addr’ may be used uninitialized in this function [-Wmaybe-uninitialized] gen_print_batch(ctx, next_batch.map, next_batch.size, ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ next_batch.addr); ~~~~~~~~~~~~~~~~ Reviewed-by: Anuj Phogat <[email protected]>
* intel/decoder: use snprintf(..., "%s", ...) instead of strncpyCaio Marcelo de Oliveira Filho2018-07-181-2/+2
| | | | | | | | | | | | | | | | | | | strncpy() doesn't guarantee the terminator NUL, so we would need to set ourselves. Just use snprintf() instead. Fixes the warnings ../../src/intel/common/gen_decoder.c: In function ‘iter_decode_field’: ../../src/intel/common/gen_decoder.c:897:7: warning: ‘strncpy’ specified bound 128 equals destination size [-Wstringop-truncation] strncpy(iter->name, iter->field->name, sizeof(iter->name)); ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ In function ‘iter_advance_field’, inlined from ‘gen_field_iterator_next’ at ../../src/intel/common/gen_decoder.c:1015:9: ../../src/intel/common/gen_decoder.c:844:7: warning: ‘strncpy’ specified bound 128 equals destination size [-Wstringop-truncation] strncpy(iter->name, iter->field->name, sizeof(iter->name)); ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ Reviewed-by: Anuj Phogat <[email protected]>
* intel/batch_decoder: Recurse for all 2nd level batchesJason Ekstrand2018-07-091-14/+5
| | | | | | | | | Our attempt to restart the loop with the second level batch worked at one point but got broken at some point. It was too fragile anyway and we're not likely to have enough secondaries to actually overflow the stack so we may as well recurse in both cases. Reviewed-by: Lionel Landwerlin <[email protected]>
* intel: batch-decoder: add missing return lineLionel Landwerlin2018-07-051-1/+1
| | | | | Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Rafael Antognolli <[email protected]>
* intel: batch-decoder: don't asks for constant BO until decodingLionel Landwerlin2018-07-051-6/+11
| | | | | | | | | | With PPGTT mappings, our aubinator implementation can be quite slow if we request a buffer that doesn't exist. Instead of doing a PPGTT walk for invalid addresses (0 lengths), wait until we're sure we want to decode the data. Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Rafael Antognolli <[email protected]>
* intel/batch-decoder: handle non-contiguous binding table / surface stateScott D Phillips2018-07-051-4/+14
| | | | Reviewed-by: Lionel Landwerlin <[email protected]>
* intel/common: Add an address de-canonicalization helperJason Ekstrand2018-05-311-0/+12
| | | | | Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Scott D Phillips <[email protected]>
* anv: move canonical_address calculation into a separate functionScott D Phillips2018-05-272-0/+44
| | | | | | | | | | | A later patch will make use of this in other places. Also, remove dependency on undefined behavior of left-shifting a signed value. v2: - move function into a separate header (Chris) v3: (by Ken) Add new header to the various build systems. Reviewed-by: Jordan Justen <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* android: change include "cutils/log.h" to "log/log.h" on Android API >=26jenny.q.cao2018-05-141-0/+4
| | | | | | | | | There is a compile warning from Android 8 (API version 26) from "include cutils/log.h" warning: "Deprecated: don't include cutils/log.h, use either android/log.h or log/log.h"-W#warnings, Change to include "log/log.h" on Android 8 or later major version to avoid this warning Signed-off-by: jenny.q.cao <[email protected]> Reviewed-by: Tapani Pälli <[email protected]>
* intel: decoder: limit to the number decoded lines from VBOLionel Landwerlin2018-05-022-8/+16
| | | | | | | | By default we set no limit, but the debug batch decoder in i965 sets it to 100. Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
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