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* radeonsi:optimizing SET_CONTEXT_REG for shaders VSSonny Jiang2018-10-053-33/+77
| | | | | Signed-off-by: Sonny Jiang <[email protected]> Signed-off-by: Marek Olšák <[email protected]>
* radeonsi:optimizing SET_CONTEXT_REG for shaders GSSonny Jiang2018-10-054-24/+154
| | | | | Signed-off-by: Sonny Jiang <[email protected]> Signed-off-by: Marek Olšák <[email protected]>
* radeonsi: optimize and allow reg > 31 in radeon_opt_set_context_reg functionsMarek Olšák2018-10-051-22/+12
| | | | | | | reg_saved will have 64 bits, and (1 << reg) where reg > 31 has undefined behavior. (1ull << reg) would be correct for 64 bits. This commit shifts the other way in order to merge the conditions.
* radeonsi: optimizing SET_CONTEXT_REG for shaders ESSonny Jiang2018-10-055-10/+37
| | | | | Signed-off-by: Sonny Jiang <[email protected]> Signed-off-by: Marek Olšák <[email protected]>
* virgl: Negotiate version with vtest serverTomeu Vizoso2018-10-043-0/+64
| | | | | | | | | | | | | | | | | | | Check if server supports version negotation by sending a PING_PROTOCOL_VERSION message right before a dummy RESOURCE_BUSY_WAIT. If we don't get a reply for the first, we know the server doesn't support it. If it does support it, we can query the max protocol version supported by the server and fall back if needed. v2: - Send a new message to negotiate the protocol version, checking if the server supports this message by immediately sending a busy wait message. (Dave Airlie) v3: - Send a zero-arg command PING_PROTOCOL_VERSION so we actually keep compatibility with older servers. (Code by Dave Airlie) Signed-off-by: Tomeu Vizoso <[email protected]> Reviewed-by: Gurchetan Singh <[email protected]>
* etnaviv: Use write combine instead of unached mappings for shader boGuido Günther2018-10-041-1/+1
| | | | | | | | | | The later are sensitive to unaligned accesses on arm64[1] and we don't need an uncached mapping here. [1]: https://lists.freedesktop.org/archives/etnaviv/2018-September/001956.html Signed-off-by: Guido Günther <[email protected]> Signed-off-by: Lucas Stach <[email protected]>
* freedreno: add the a6xx sources to the Android buildEmil Velikov2018-10-031-0/+1
| | | | | | | | | | | | Add the files otherwise things just won't build. Haven't actually tested it, but it's a small step in the right direction. Fixes: de3b34df973 ("freedreno: Add a6xx backend") Cc: Kristian H. Kristensen <[email protected]> Cc: Rob Clark <[email protected]> Signed-off-by: Emil Velikov <[email protected]> Reviewed-by: Rob Clark <[email protected]>
* pipe-loader: add a dup() in pipe_loader_sw_probe_kmsEmil Velikov2018-10-032-2/+12
| | | | | | | | | | | | | | | | | The pipe_loader_release API closes the fd given, even if the pipe-loader should _not_ take ownership of it. With earlier commit we fixed pipe_loader_drm_probe_fd, and now with cover the final piece. Note that unlike the DRM case, here the caller _did_ forget to dup before using it ... most likely leading to all sorts of fun. Don't forget the close in the error path. Seems like the things are a bit leaky/asymmetrical with the semi-recent config work. But we can shave that yak another day ;-) Signed-off-by: Emil Velikov <[email protected]>
* pipe-loader: move dup(fd) within pipe_loader_drm_probe_fdEmil Velikov2018-10-038-44/+37
| | | | | | | | | | | | | | | | | | | | | | Currently pipe_loader_drm_probe_fd takes ownership of the fd given. To match that, pipe_loader_release closes it. Yet we have many instances which do not want the change of ownership, and thus duplicate the fd before passing it to the pipe-loader. Move the dup() within pipe-loader, explicitly document that and document all the cases through the codebase. A trivial git grep -2 pipe_loader_release makes things as obvious as it gets ;-) Cc: Leo Liu <[email protected]> Cc: Thomas Hellstrom <[email protected]> Cc: Axel Davy <[email protected]> Cc: Patrick Rudolph <[email protected]> Signed-off-by: Emil Velikov <[email protected]> Reviewed-by: Thomas Hellstrom <[email protected]> Reviewed-by: Axel Davy <[email protected]> (for nine)
* st/nine: do not double-close the fd on teardownEmil Velikov2018-10-031-1/+1
| | | | | | | | | | | | | As the newly introduced comment says: The pipe loader takes ownership of the fd Thus, there's no need to close it again. Cc: Patrick Rudolph <[email protected]> Cc: Axel Davy <[email protected]> Cc: [email protected]> Signed-off-by: Emil Velikov <[email protected]> Reviewed-by: Axel Davy <[email protected]>
* vl/dri3: do full teardown on screen_destroyEmil Velikov2018-10-031-1/+0
| | | | | | | | | | | Earlier commit added support for 'front_buffers', erroneously adding a return in vl_dri3_screen_destroy. Effectively leaking a lot of state. Fixes: 8d7ac0a4e4d ("vl/dri3: implement DRI3 BufferFromPixmap") Cc: Leo Liu <[email protected]> Cc: Christian König <[email protected]> Signed-off-by: Emil Velikov <[email protected]> Reviewed-by: Leo Liu <[email protected]>
* st/dri: make swrast_no_present member of dri_screenEmil Velikov2018-10-032-4/+5
| | | | | | | Just like the dri2 options, this is better suited in the dri_screen struct. Signed-off-by: Emil Velikov <[email protected]>
* st/dri: inline dri2_buffer.h within dri2.cEmil Velikov2018-10-034-26/+16
| | | | | | | | The header was used only by dri2.c, containing a two-member struct and cast wrapper. Just inline it where it's used/needed. Signed-off-by: Emil Velikov <[email protected]> Reviewed-by: Eric Engestrom <[email protected]>
* st/xa: remove unused xa_screen::d[s]_depth_bits_lastEmil Velikov2018-10-031-2/+0
| | | | | | | Unused since the initial import. Signed-off-by: Emil Velikov <[email protected]> Reviewed-by: Eric Engestrom <[email protected]>
* r600: use build-id when available for disk cacheTimothy Arceri2018-10-031-7/+7
| | | | Reviewed-by: Marek Olšák <[email protected]>
* nouveau: use build-id when available for disk cacheTimothy Arceri2018-10-031-7/+7
| | | | Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: use build-id when available for disk cacheTimothy Arceri2018-10-031-12/+9
| | | | Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: avoid sending GS_EMIT in shaders without outputsJózef Kucia2018-10-021-3/+6
| | | | | | | | | Fixes GPU hangs. Cc: 18.1 18.2 <[email protected]> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107857 Signed-off-by: Józef Kucia <[email protected]> Signed-off-by: Marek Olšák <[email protected]>
* radeonsi: initialize ac_gpu_info::name when using SI_FORCE_FAMILYMarek Olšák2018-10-021-0/+1
| | | | | so that it's not NULL when loading radeonsi and a GCN GPU is not present in the system.
* radeonsi: don't set the VS prolog key for the blit VSMarek Olšák2018-10-021-1/+2
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* freedreno/a6xx: hwbinningRob Clark2018-10-028-105/+159
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno: update generated headersRob Clark2018-10-027-41/+52
| | | | Signed-off-by: Rob Clark <[email protected]>
* radeonsi: add a workaround for bitfield_extract when count is 0Timothy Arceri2018-10-021-11/+30
| | | | | | | | | | | | | | | This ports the fix from 3d41757788ac. Both LLVM 7 & 8 continue to have this problem. It fixes rendering issues in some menu and loading screens of Civ VI which can be seen in the trace from bug 104602. Note: This does not fix the black triangles on Vega for bug 104602. Reviewed-by: Marek Olšák <[email protected]> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=104602 Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107276
* gallium/util: Clarify comment in util_init_thread_pinningMichel Dänzer2018-09-281-1/+4
| | | | | | | | | | As discussed in the review of the patch which added the comment: Nothing happens when a thread is created, because pthread_atfork doesn't affect creating threads. However, spawning a child process will likely crash. Reviewed-by: Marek Olšák <[email protected]>
* freedreno/a6xx: Build up draw dword0 outside visibilty if statementKristian H. Kristensen2018-09-271-17/+18
| | | | | | | | Pulling this logic out means we can share the logic and avoid a couple of temporary variables that helped make things clearer before. Note that in either vismode case, we always program vismode 0. Signed-off-by: Kristian H. Kristensen <[email protected]>
* freedreno/a6xx: Simplify draw_emit() branches a bitKristian H. Kristensen2018-09-271-16/+8
| | | | | | | | Now that we've copied the emit logic into each branch of the if (info->index_size) statement, we can simplify the logic a bit according to which case we're in. Signed-off-by: Kristian H. Kristensen <[email protected]>
* freedreno/a6xx: Copy OUT_RING() part into each branch of the index ifKristian H. Kristensen2018-09-271-17/+29
| | | | Signed-off-by: Kristian H. Kristensen <[email protected]>
* freedreno/a6xx: Split fd6_draw_emit into direct and indirect pathsKristian H. Kristensen2018-09-271-36/+46
| | | | | | | This splits the two code paths into separate functions and moves the "if (info->indirect)" test into draw_impl(). Signed-off-by: Kristian H. Kristensen <[email protected]>
* freedreno/a6xx: Inline fd6_draw()Kristian H. Kristensen2018-09-271-31/+17
| | | | | | Simplify the code a bit by inlining this helper. Signed-off-by: Kristian H. Kristensen <[email protected]>
* freedreno/a6xx: Move emit_marker and wfi to draw_impl()Kristian H. Kristensen2018-09-271-17/+12
| | | | | | | This way the markers clearly bracket the draw call and isn't duplicated for both direct and indirect draw code. Signed-off-by: Kristian H. Kristensen <[email protected]>
* freedreno/a6xx: Move inline functions out of fd6_draw.hKristian H. Kristensen2018-09-273-108/+110
| | | | | | Only used in fd6_draw.c so put them there. Signed-off-by: Kristian H. Kristensen <[email protected]>
* freedreno: fix a typo in launch_gridHyunjun Ko2018-09-271-1/+1
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* freedreno/ir3: fix the param order of cmpxchgHyunjun Ko2018-09-271-2/+2
| | | | | | | | | | | According to the following definition, int AtomicCompSwap(inout int mem, uint compare, uint data); the preceding one in atomic_comp_swap of NIR is compare and data is followed, while src0 for cmpxchg needs vec2(data, compare) So for ssbo/image deref comp_swap, that should be reversed. Fixes: dEQP-GLES31.functional.image_load_store.*.atomic.comp_swap*
* freedreno/a6xx: fix shaders w/ >= 24 regsRob Clark2018-09-271-1/+1
| | | | | | | | Possibly these bits mean something else now. Blob always seems to use FOUR_QUADS, and changing to TWO_QUADS seems to cause different threads to overlap registers. Signed-off-by: Rob Clark <[email protected]>
* freedreno/a6xx: fix gl_FragCoord.wRob Clark2018-09-271-2/+6
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno: handle invalidated buffers harderRob Clark2018-09-278-7/+39
| | | | | | Do a better job of skipping mem2gmem/gmem2mem.. Signed-off-by: Rob Clark <[email protected]>
* freedreno/a6xx: fix constlenRob Clark2018-09-271-7/+6
| | | | | | | | | Fix a few bits of confusion, as with previous gen's constlen is aligned to 4, and value in bitfield is left-shifted by 2 (ie. divided by 4). But this is done by the CONSTLEN() accessor/builder fxn, so don't do it twice. Also HLSQ_FS_CNTL.CONSTLEN is not special. Signed-off-by: Rob Clark <[email protected]>
* freedreno: fix inorder rendering caseRob Clark2018-09-271-6/+7
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno/a6xx: backface stencil stateRob Clark2018-09-272-2/+4
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno/a6xx: fix gpu crash with separate-stencilRob Clark2018-09-271-1/+1
| | | | | | | Fixes a crash in (of all things) dEQP-GLES2.info.vendor with --deqp-surface-type=fbo.. Signed-off-by: Rob Clark <[email protected]>
* freedreno/a6xx: fix MRT configRob Clark2018-09-271-7/+7
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno: fix potential hang when destroying batchRob Clark2018-09-271-1/+1
| | | | | | | batch_flush_reset_dependencies() expects to be called unlocked, and can call fd_batch_reference() which can try to aquire the screen lock again. Signed-off-by: Rob Clark <[email protected]>
* freedreno: fix corrupted fb stateRob Clark2018-09-272-2/+5
| | | | | | | | | | | In c3d9f29b we allowed ctx->batch to be null, and started tracking the current framebuffer state in fd_context. But the existing logic in fd_blitter_pipe_begin() would, if !ctx->batch, set null fb state to be restored after blit. Which broke the world of deqp (and probably other things) Fixes: c3d9f29b781 freedreno: allocate ctx's batch on demand Signed-off-by: Rob Clark <[email protected]>
* freedreno: simplify pctx->clear()Rob Clark2018-09-276-74/+11
| | | | | | | | | | | | This is defined to always clear the entire surface(s) specified, regardless of scissor state.. mesa/st will turn scissored clears into a draw. So rip about a bunch of unnecessary machinery. Also remove a comment that was obsolete since using u_blitter to turn clear into draw (for the cases where there isn't a hw blitter fast-path). Signed-off-by: Rob Clark <[email protected]>
* freedreno: fix FD_MESA_DEBUG=flushRob Clark2018-09-272-2/+8
| | | | | | | The logic to force a flush every draw was short-circuited with newer kernels. Also it should apply to clears as well. Signed-off-by: Rob Clark <[email protected]>
* freedreno: fix scissor state emitRob Clark2018-09-274-4/+8
| | | | | | | The effective scissor changes based on rasterizer->scissor flag, so we need to re-emit scissor state when rasterizer state changes. Signed-off-by: Rob Clark <[email protected]>
* freedreno: update generated headersRob Clark2018-09-278-340/+1089
| | | | Signed-off-by: Rob Clark <[email protected]>
* radeonsi: NaN should pass kill_ifAxel Davy2018-09-251-1/+2
| | | | | | | | | | | | | | | Fixes: https://bugs.freedesktop.org/show_bug.cgi?id=105333 Fixes: https://github.com/iXit/Mesa-3D/issues/314 For this application, NaN is passed to KILL_IF and is expected to pass. v2: Explain in the code why UGE is used. Signed-off-by: Axel Davy <[email protected]> Reviewed-by: Marek Olšák <[email protected]> CC: <[email protected]>
* st/nine: Do not mark both ff vs and ps updatedAxel Davy2018-09-251-2/+4
| | | | | | | | | | | | | | | | Previously if only ff vs or only ff ps was used, the constants for both were marked as updated, while only the constants of the used ff shader were updated. Now that NINE_STATE_FF_VS and NINE_STATE_FF_PS do not intersect anymore, we can correctly mark the correct set of constant as updated. Fixes: https://github.com/iXit/Mesa-3D/issues/319 Signed-off-by: Axel Davy <[email protected]>
* st/nine: Split NINE_STATE_FF_OTHERAxel Davy2018-09-255-23/+23
| | | | | | | | | | | NINE_STATE_FF_OTHER was mostly ff vs states. Rename it to NINE_STATE_FF_VS_OTHER and move common states with ps to NINE_STATE_FF_PS_CONSTS (renamed from NINE_STATE_FF_PSSTAGES). Signed-off-by: Axel Davy <[email protected]>
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-02 14:50:41 +0000