aboutsummaryrefslogtreecommitdiffstats
path: root/src/gallium
Commit message (Collapse)AuthorAgeFilesLines
* iris: Bail resource creation upon aux creation errorNanley Chery2019-10-291-16/+17
| | | | | | | | The functions used during aux buffer configuration and creation only return false for exceptional errors. Don't proceed with surface creation in those cases. Reviewed-by: Jordan Justen <[email protected]>
* iris: Drop iris_resource::aux::extra_aux::boNanley Chery2019-10-292-16/+3
| | | | | | | | The primary and secondary aux buffers are always allocated in the same BO. Suggested-by: Kenneth Graunke <[email protected]> Reviewed-by: Jordan Justen <[email protected]>
* zink: pass line width from rast_state to gfx_pipeline_state.Duncan Hopkins2019-10-291-1/+3
| | | | Reviewed-by: Erik Faye-Lund <[email protected]>
* iris: Implement new way for setting streamout buffers.Plamena Manolova2019-10-292-3/+23
| | | | | | | | | For gen12 we set the streamout buffers using 4 separate commands instead of 3DSTATE_SO_BUFFER. Signed-off-by: Plamena Manolova <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* freedreno/a6xx: add a618 supportRob Clark2019-10-293-0/+27
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno/a6xx: cleanup magic registersRob Clark2019-10-296-22/+47
| | | | | | | | Extract out values for the handful of unknown registers which have different values across different a6xx models, to simplify adding support for new a6xx's. Signed-off-by: Rob Clark <[email protected]>
* freedreno/a6xx: remove some left over dead codeRob Clark2019-10-291-10/+0
| | | | | | These registers don't exist, just remnants of initial port from a5xx. Signed-off-by: Rob Clark <[email protected]>
* gallium/swr: Enable GL_ARB_gpu_shader5: multiple streamsKrzysztof Raszkowski2019-10-296-14/+78
| | | | | | | Added support for geometry shader multiple streams (part of GL_ARB_gpu_shader5 extension). Reviewed-by: Jan Zielinski <[email protected]>
* panfrost: Cleanup _shader_upper -> shaderAlyssa Rosenzweig2019-10-291-4/+4
| | | | | | I don't believe this is actually a tagged pointer; warn if it is. Signed-off-by: Alyssa Rosenzweig <[email protected]>
* winsys/amdgpu: use the new GPU reset queryMarek Olšák2019-10-281-20/+37
|
* radeonsi: initialize shader compilers in threads on demandMarek Olšák2019-10-284-8/+14
| | | | | | It takes a noticable amount of time with piglit. Reviewed-by: Timothy Arceri <[email protected]>
* radeonsi: don't print diagnostic LLVM remarks and notesMarek Olšák2019-10-281-6/+3
| | | | | | We don't use them. Reviewed-by: Timothy Arceri <[email protected]>
* loader: default to iris for all future PCI IDsEric Engestrom2019-10-281-0/+1
| | | | | | | | | | The existing "fallback" code didn't actually do anything, so this removes it, and instead we just always fallback to `iris` for future PCI IDs. Suggested-by: Kenneth Graunke <[email protected]> Signed-off-by: Eric Engestrom <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* iris: Create resource with aux_usage MCS_CCSSagar Ghuge2019-10-281-1/+2
| | | | | Signed-off-by: Sagar Ghuge <[email protected]> Reviewed-by: Nanley Chery <[email protected]>
* iris: Get correct resource aux usage for copySagar Ghuge2019-10-281-0/+1
| | | | | | | | | | Add case for MCS_CCS so that we get the correct aux usage while copy operation. v2: Fix commit subject (Nanley Chery) Signed-off-by: Sagar Ghuge <[email protected]> Reviewed-by: Nanley Chery <[email protected]>
* iris: Define MCS_CCS state transitions and usagesSagar Ghuge2019-10-282-5/+10
| | | | | | | | v2: 1) Fix assertion check (Nanley Chery) 2) Correct commit subject (Nanley Chery) Signed-off-by: Sagar Ghuge <[email protected]> Reviewed-by: Nanley Chery <[email protected]>
* iris: Initialize CCS to fast clear while using with MCSSagar Ghuge2019-10-281-3/+14
| | | | | | | | | | v2: Explain Bsepc quotes properly (Nanley Chery) v3: 1) Fix comment format (Nanley Chery) 2) Fix typo in comment (Nanley Chery) Signed-off-by: Sagar Ghuge <[email protected]> Reviewed-by: Nanley Chery <[email protected]>
* zink: emulate optional depth-formatsErik Faye-Lund2019-10-286-8/+42
| | | | | | | | | | | | | | | The Vulkan spec says that an implementation has to support one of VK_FORMAT_X8_D24_UNORM_PACK32 and VK_FORMAT_D32_SFLOAT, as well of one of VK_FORMAT_D24_UNORM_S8_UINT and VK_FORMAT_D32_SFLOAT_S8_UINT. So let's keep track which one is supported of earch pair, and emulate one on top of the other one. This won't give the exact result for comparisons, or when mapping and unmapping the resources. But it's better than flat out failing to create the resource, and we can fix the map/unmap issue later if needed. Tested-by: Duncan Hopkins <[email protected]>
* zink: error if VK_KHR_maintenance1 isn't supportedErik Faye-Lund2019-10-282-2/+7
| | | | | While we're at it, remove the VK_-prefix from the extension bool; all extensions have this so it's kinda superfluous.
* iris: Disallow incomplete resource creationNanley Chery2019-10-281-2/+6
| | | | | | | | If a modifier specifies an aux, it must be created. Fixes: 75a3947af46 ("iris/resource: Fall back to no aux if creation fails") Reviewed-by: Sagar Ghuge <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* iris: Don't leak the resource for unsupported modifierNanley Chery2019-10-281-1/+1
| | | | | | | | Make sure the res struct is free'd before returning. Fixes: 2dce0e94a3d ("iris: Initial commit of a new 'iris' driver for Intel Gen8+ GPUs.") Reviewed-by: Sagar Ghuge <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* iris: Enable HIZ_CCS samplingNanley Chery2019-10-283-8/+24
| | | | | Reviewed-by: Sagar Ghuge <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* iris: Start using blorp_can_hiz_clear_depth()Nanley Chery2019-10-281-1/+7
| | | | | | | | Check that the alignment requirements for HIZ_CCS are satisfied by using this function. Reviewed-by: Sagar Ghuge <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* iris: Enable HIZ_CCS in depth buffer instructionsNanley Chery2019-10-282-3/+7
| | | | | Reviewed-by: Sagar Ghuge <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* iris: Define initial HIZ_CCS state and transitionsNanley Chery2019-10-283-13/+20
| | | | | | | Make it match those of HIZ. Reviewed-by: Sagar Ghuge <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* iris: Create an unusable secondary aux surfaceNanley Chery2019-10-282-6/+49
| | | | | | | | | | | | The HIZ_CCS and MCS_CCS auxiliary surface modes require that drivers store information about two aux buffers. We choose to represent this as HiZ/MCS being the primary aux surface and the CCS as an secondary/extra aux surface. This representation has the effect of placing most of the code that will have to choose between the two aux surfaces around the aux-map entry points. Reviewed-by: Sagar Ghuge <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* iris: Don't guess the aux_usageNanley Chery2019-10-281-96/+72
| | | | | | | | | Instead of guessing an aux_usage, then confirming it if the isl_surf_get_*_surf functions are successful, just call the ISL functions up-front. This will help us to more easily determine if a depth buffer supports HIZ_CCS. Reviewed-by: Kenneth Graunke <[email protected]>
* intel: Support HIZ_CCS in isl_surf_get_ccs_surfNanley Chery2019-10-281-1/+1
| | | | | | | Add an extra aux parameter which will be filled out with CCS if the first two isl_surf parameters fit the requirements for HiZ_CCS. Reviewed-by: Kenneth Graunke <[email protected]>
* iris: Clear ::has_hiz when disabling auxNanley Chery2019-10-281-0/+1
| | | | | Fixes: 2cddc953cd0 ("iris: some initial HiZ bits") Reviewed-by: Kenneth Graunke <[email protected]>
* iris: Allow for non-Y-tiled aux allocationNanley Chery2019-10-281-1/+2
| | | | | | | | The Gen12 CCS is not Y-tiled. Reviewed-by: Sagar Ghuge <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Jordan Justen <[email protected]>
* iris: Don't assume CCS_E includes CCS_DNanley Chery2019-10-281-2/+3
| | | | | | | | There's no longer a clear-only compression mode of CCS on Gen12+. Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Sagar Ghuge <[email protected]> Reviewed-by: Jordan Justen <[email protected]>
* iris: Drop support for I915_FORMAT_MOD_Y_TILED_CCS on TGL+Nanley Chery2019-10-281-1/+1
| | | | | | | The format of the CCS has changed. Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Jordan Justen <[email protected]>
* iris: Add support for depth bounds testing.Plamena Manolova2019-10-282-0/+24
| | | | | | | | In gen12 we use the 3DSTATE_DEPTH_BOUNDS instruction to enable depth bounds testing. Signed-off-by: Plamena Manolova <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* util: remove LIST_IS_EMPTY macroTimothy Arceri2019-10-2821-45/+45
| | | | | | | Just use the inlined function directly. The new function was introduced in addcf410. Reviewed-by: Eric Engestrom <[email protected]>
* util: rename list_empty() to list_is_empty()Timothy Arceri2019-10-2820-33/+33
| | | | | | | This makes it clear that it's a boolean test and not an action (eg. "empty the list"). Reviewed-by: Eric Engestrom <[email protected]>
* util: remove LIST_DEL macroTimothy Arceri2019-10-2826-61/+61
| | | | | | | Just use the inlined function directly. The macro was replaced with the function in ebe304fa540f. Reviewed-by: Eric Engestrom <[email protected]>
* util: remove LIST_DELINIT macroTimothy Arceri2019-10-286-10/+10
| | | | | | | Just use the inlined function directly. The macro was replaced with the function in ebe304fa540f. Reviewed-by: Eric Engestrom <[email protected]>
* util: remove LIST_REPLACE macroTimothy Arceri2019-10-281-1/+1
| | | | | | | Just use the inlined function directly. The macro was replaced with the function in ebe304fa540f. Reviewed-by: Eric Engestrom <[email protected]>
* util: remove LIST_ADD macroTimothy Arceri2019-10-289-22/+22
| | | | | | | Just use the inlined function directly. The macro was replaced with the function in ebe304fa540f. Reviewed-by: Eric Engestrom <[email protected]>
* util: remove LIST_ADDTAIL macroTimothy Arceri2019-10-2830-54/+54
| | | | | | | Just use the inlined function directly. The macro was replaced with the function in ebe304fa540f. Reviewed-by: Eric Engestrom <[email protected]>
* util: remove LIST_INITHEAD macroTimothy Arceri2019-10-2834-73/+73
| | | | | | | Just use the inlined function directly. The macro was replaced with the function in ebe304fa540f. Reviewed-by: Eric Engestrom <[email protected]>
* zink: simplify gl-to-vulkan loweringErik Faye-Lund2019-10-281-48/+23
| | | | Acked-by: Jordan Justen <[email protected]>
* zink/spirv: more complete sampler-dim handlingErik Faye-Lund2019-10-281-4/+8
| | | | Acked-by: Jordan Justen <[email protected]>
* zink: fixup scissoringErik Faye-Lund2019-10-282-35/+12
| | | | Acked-by: Jordan Justen <[email protected]>
* zink: limited uniform buffer size so the limits is not exceeded.Duncan Hopkins2019-10-281-1/+2
| | | | Acked-by: Jordan Justen <[email protected]>
* zink: do not set lineWidth to invalid valueErik Faye-Lund2019-10-281-1/+6
| | | | | | | | Some implementations don't support the lineWidth-feature, so let's avoid setting invalid state to them. But since we don't have a fallback for this, inform the user. Acked-by: Jordan Justen <[email protected]>
* zink: pass screen to zink_create_gfx_pipelineErik Faye-Lund2019-10-283-4/+8
| | | | Acked-by: Jordan Justen <[email protected]>
* zink: respect ubo buffer alignment requirementDuncan Hopkins2019-10-281-2/+5
| | | | | | | | The driver can report a minimum alignment for UBOs, and that can be larger than 64, which we've currently been using. Let's play ball, and use the reported value instead. Acked-by: Jordan Justen <[email protected]>
* zink: fix line-width calculationDuncan Hopkins2019-10-281-3/+16
| | | | | | | | | | | There's two things that goes wrong in this code on some drivers: 1. Rounding off the line-width to granularity can push it outside the legal range. 2. A granularity of 0.0 results in NaN, because we divide by zero. So let's make this code a bit more robust. Acked-by: Jordan Justen <[email protected]>
* zink: fixup return-valueErik Faye-Lund2019-10-281-1/+1
| | | | Acked-by: Jordan Justen <[email protected]>
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-09 21:42:49 +0000